Datasheet > MT58L256L18P1F-5

MT58L256L18P1F-5

更新时间： 2023-08-15 00:00:00

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		静态存储器
页数	文件大小	规格书
30页	466K
描述
Cache SRAM, 256KX18, 2.8ns, CMOS, PBGA165, FBGA-165

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数据手册

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MT58L256L18P1F-5 数据手册

4Mb: 256K x 18, 128K x 32/36

PIPELINED, SCD SYNCBURST SRAM

FUNCTIONALBLOCKDIAGRAM

256K x 18

ADDRESS

SA0, SA1, SA

MODE

SA0, SA1

SA1'

ADV#

CLK

BINARY

COUNTER AND

LOGIC

SA0'

CLR

ADSC#

ADSP#

BYTE “b”

WRITE DRIVER

BYTE “b”

WRITE REGISTER

OUTPUT

BUFFERS

BWb#

256K x 9 x 2

MEMORY

ARRAY

DQs

DQPa

DQPb

OUTPUT

REGISTERS

SENSE

AMPS

BYTE “a”

WRITE DRIVER

BYTE “a”

WRITE REGISTER

BWa#

BWE#

INPUT

REGISTERS

GW#

ENABLE

CE#

CE2

PIPELINED

ENABLE

CE2#

OE#

FUNCTIONALBLOCKDIAGRAM

128K x 32/36

ADDRESS

SA0, SA1, SA

MODE

SA0, SA1

SA1'

BINARY

COUNTER

ADV#

CLK

SA0'

CLR

ADSC#

ADSP#

BYTE “d”

WRITE DRIVER

BYTE “d”

WRITE REGISTER

BWd#

BWc#

128K x 8 x 4

(x32)

BYTE “c”

WRITE DRIVER

BYTE “c”

WRITE REGISTER

DQs

DQPa

OUTPUT

BUFFERS

OUTPUT

REGISTERS

128K x 9 x 4

(x36)

SENSE

AMPS

BYTE “b”

WRITE DRIVER

MEMORY

ARRAY

BYTE “b”

WRITE REGISTER

DQPd

BWb#

BYTE “a”

WRITE DRIVER

BYTE “a”

WRITE REGISTER

BWa#

BWE#

INPUT

REGISTERS

GW#

CE#

CE2

ENABLE

PIPELINED

ENABLE

CE2#

OE#

NOTE: Functional block diagrams illustrate simplified device operation. See truth tables, pin descriptions, and timing diagrams

for detailed information.

4Mb:256Kx18, 128Kx32/36Pipelined, SCDSyncBurstSRAM

MT58L256L18P1_F.p65 – Rev. F, Pub. 1/03 EN

MicronTechnology,Inc.,reservestherighttochangeproductsorspecificationswithoutnotice.

123 4 5 6 7...30

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