8Mb: 512K x 18, 256K x 32/36
3.3V I/O, PIPELINED, DCD SYNCBURST SRAM
™
MT58L512L18D, MT58L256L32D,
8Mb SYNCBURST
SRAM
MT58L256L36D
3.3V VDD, 3.3V I/O, Pipelined, Double-
Cycle Deselect
FEATURES
• Fast clock and OE# access times
100-Pin TQFP**
• Single +3.3V +0.3V/-0.165V power supply (VDD)
• Separate +3.3V isolated output buffer supply (VDDQ)
• SNOOZE MODE for reduced-power standby
• Common data inputs and data outputs
• Individual BYTE WRITE control and GLOBAL WRITE
• Three chip enables for simple depth expansion and
address pipelining
• Clock-controlled and registered addresses, data I/Os
and control signals
• Internally self-timed WRITE cycle
• Burst control (interleaved or linear burst)
• Automatic power-down for portable applications
• 100-pin TQFP package
• 165-pin FBGA package
• 119-pin BGA package
• Low capacitive bus loading
• x18, x32, and x36 versions available
165-Pin FBGA
(Preliminary Package Data)
OPTIONS
MARKING
• Timing (Access/Cycle/MHz)
3.5ns/6ns/166 MHz
4.0ns/7.5ns/133 MHz
5ns/10ns/100 MHz
-6
-7.5
-10
• Configurations
512K x 18
MT58L512L18D
MT58L256L32D
MT58L256L36D
256K x 32
256K x 36
• Packages
100-pin TQFP (2-chip enable)
100-pin TQFP (3-chip enable)
165-pin, 13mm x 15mm FBGA
119-pin, 14mm x 22mm BGA
T
S
F
B
119-Pin BGA
• Operating Temperature Range
Commercial (0°C to +70°C)
Industrial (-40°C to +85°C)**
None
IT
Part Number Example
MT58L512L18DT-7.5
* A Part Marking Guide for the FBGA devices can be found on Micron’s
web site—http://www.micron.com/support/index.html.
**Industrial temperature range offered in specific speed grades and
confgurations. Contact factory for more information.
NOTE: 1. JEDEC-standard MS-026 BHA (LQFP).
2. JEDEC-standard MS-028 BHA (PBGA).
8Mb: 512K x 18, 256K x 32/36 3.3V I/O, Pipelined, DCD SyncBurst SRAM
MT58L512L18D_C.p65 – Rev. 6/01
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2001, Micron Technology, Inc.
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