¡ Semiconductor
MSM548333
RCLKY2 : Read Clock for Y2
RCLKY2 is a read control clock input for Y2. (Note that there is RCLKC2 for C2.) Synchronized
with RCLKY2's rising edge, the serial read access from Y2 is executed when REY2/RY is high.
REY2/RY : Read Enable for Y2/Read Y Address Reset Logic Function for Y2
REY2/RY is a dual function control input. REY2, one of the two functions of REY2/RY, enables or
disablesbothinternalreadaddresspointersanddata-outbuffersofY2. WhenREY2/RY ishigh, the
internal read address pointer for Y2 is incremented synchronously with RCLKY2. When REY2/RY
is low, even if RCLKY2 is input, the internal read address pointer is not incremented.
RY, the second function of REY2/RY, works as an element to set read Y address (or bit address in
a certain line) reset mode. In a read address reset mode cycle, defined by RR2/TR high, RY works
asoneofinputswhichformseveralreadresetlogicasshowninthe"FUNCTIONTABLEforread".
In the read address reset cycle, when REY2/RY is low, the internal read Y address for Y2 is reset to
0. When REY2/RY is high, the internal read Y address for Y2 is reset to the address which was set
in the previous address set cycle.
DOY2/0-7 : Data-Outs for Y2
DOY2/0-7areserialdata-outsforY2.Eachcorrespondingdata-out-buffer'impedanceiscontrolled
by REY2/RY.
RYADC2 : Read Y Address for C2
RYADC2isareadYaddress(orbitaddressinacertainline)inputonlyforC2.RYADC2specifies
the first bit address of serial read data in the line whose line address is specified by RXAD2. 10 bits
of Y address data are input serially from RYADC2.
RCLKC2 : Read Clock for C2
RCLKC2isareadcontrolclockinputforonlyC2.(NotethatthereisRCLKY2forY2.)Synchronized
with RCLKC2, serial read access from C2 is executed when REC2/RY is high.
REC2/RY : Read Enable for C2/Read Y Address Reset Logic Function for C2
REC2/RY is a dual function control input. REC2, one of the two functions of REC2/RY, enables or
disables both internal read address pointers and data-out buffers for C2. When REC2/RY is high, the
internal read address pointer for C2 is incremented synchronously with RCLKC2. When REC2/RY
is low, even if RCLKC2 is input, the internal read address pointer is not incremented.
RY, the second function of REC2/RY, performs a function for setting the read Y address (or bit
address in a certain line) reset mode. In an address reset mode cycle, defined by RR2/TR high, RY
works as one of inputs which form several read reset logic as shown in the "FUNCTION TABLE for
read". In the read address reset cycle, when REC2/RY is low, the internal read Y address for C2 is
resetto0. WhenREC2/RYishigh, theinternalreadYaddressforC2isresettotheaddresswhich
was set in the previous read address set cycle.
DOC2/0-3 : Data-Outs for C2
DOC2/0-3 are serial data-outs for C2. Each corresponding data out buffer' impedance is controlled
by REC2/RY.
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