E2L0044-17-Y1
This version: Jan. 1998
Previous version: Dec. 1996
¡ Semiconductor
MSM548512L
¡ Semiconductor
MSM548512L
524,288-Word ¥ 8-Bit High-Speed PSRAM
DESCRIPTION
TheMSM548512LisfabricatedusingOKI’sCMOSsilicongateprocesstechnology. Thisprocess,
coupledwithsingle-transistermemorystoragecells,permitsmaximumcircuitdensity,minimum
chip size and high speed.
MSM548512L has Self-refresh mode in addition to Address-refresh mode and Auto-refresh
mode. In the Self-refresh mode the internal refresh timer and address counter refresh the
dynamic memory cells automatically. This series allows low power consumption when using
standby mode with Self-refresh.
The MSM548512L also features a static RAM-like write function that writes the data into the
memory cell at the rising edge of WE.
FEATURES
• Large capacity
• Fast access time
• Low power
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4-Mbit (524,288-word ¥ 8 bits)
80 ns max.
200 µA max. (standby with Self-refresh)
Self refresh
SRAM WE pin, no address multiplex
5 V ±10%
2048 cycle/32 ms auto-address refresh
SRAM standard package
• Refresh free
• Logic compatible
• Single power supply
• Refresh
• Package compatible
• Package options:
32-pin 600 mil plastic DIP
32-pin 525 mil plastic SOP
(DIP32-P-600-2.54)
(SOP32-P-525-1.27-K) (Product : MSM548512L-xxGS-K)
xx indicates speed rank.
(Product : MSM548512L-xxRS)
PRODUCT FAMILY
Access Time (Max.)
Family
MSM548512L-80RS
MSM548512L-10RS
MSM548512L-12RS
MSM548512L-80GS-K
MSM548512L-10GS-K
MSM548512L-12GS-K
Package
80 ns
100 ns
120 ns
80 ns
600 mil 32-pin
Plastic DIP
525 mil 32-pin
Plastic SOP
100 ns
120 ns
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