5秒后页面跳转
MSM548332 PDF预览

MSM548332

更新时间: 2022-12-13 04:56:09
品牌 Logo 应用领域
冲电气 - OKI 存储
页数 文件大小 规格书
23页 244K
描述
278,400-Word x 12-Bit Field Memory

MSM548332 数据手册

 浏览型号MSM548332的Datasheet PDF文件第3页浏览型号MSM548332的Datasheet PDF文件第4页浏览型号MSM548332的Datasheet PDF文件第5页浏览型号MSM548332的Datasheet PDF文件第7页浏览型号MSM548332的Datasheet PDF文件第8页浏览型号MSM548332的Datasheet PDF文件第9页 
¡ Semiconductor  
MSM548332  
WRITE RELATED  
WCLK : Write Clock  
WCLKisawritecontrolclockinput. SynchronizedwithWCLK'srisingedge, serialwriteaccessinto  
write ports is executed when WE is high and IE is high.  
AccordingtoWCLKclocks,theinternalcounterfortheserialaddressisincrementedautomatically.  
Inawriteaddresssetcycle, allthewriteaddresseswhichwereinputfromWXADarestoredinto  
internal address registers synchronously with WCLK. In this address set cycle, WADE/RX must be  
held high and WR/TR must be held low.  
In the write address reset cycle, various write address reset modes can be set synchronously with  
WCLK. These reset cycles replace complicated serial address control with simple reset cycle control  
which requires only one WCLK cycle. It greatly facilitates memory access.  
WE : Write Enable  
WE is a write enable clock input. WE enables or disables both internal write address pointers and  
data-inbuffers.WhenWEishigh,theinternalwriteaddresspointerisincrementedsynchronously  
with WCLK. When WE is low, even if WCLK is input, the internal write address pointer is not  
incremented.  
DIN0-11 : Data-Ins  
DIN0-11 are serial data-ins. Corresponding data-in-buffers are masked by IE.  
WR/TR : Write Reset/Write Transfer  
WR/TR is a write reset control input. Write address reset modes are defined when WR/TR level is  
high according to the "FUNCTION TABLE for write".  
When the write operation on a line is terminated, be sure to perform a write transfer operation by  
WR/TR in order to store the written data in the write register to corresponding memory cells.  
WXINC : Write X Address Increment  
WXINCisawriteXaddress(orlineaddress)incrementcontrolinput.Inthewriteaddressresetcycle,  
defined by WR/TR high, the write X address (or line address) is incremented when WXINC and  
WADE/RX are high.  
WADE/RX : Write Address Enable/Write X Address Reset Logic Function  
WADE/RX is a dual functional control input. WADE, one of the two functions of WADE/RX, is a  
write address enable input. In the write address reset cycle, defined by WR/TR high, X address (or  
lineaddress)inputfromWXADislatchedintointernalwriteXaddressregistersynchronouslywith  
WCLK.  
WXAD : Write X Address  
WXAD is a write X address (or line address) input. WXAD specifies line address. 9 bits of write X  
address data are input serially from WXAD.  
IE : Input Enable  
IE is an input enable which controls the write operation. When IE is high, the input operation is  
enabled. When IE is low, the write operation is masked. When WE signal is high, and IE low, the  
internalserialwriteaddresspointerisincrementedontherisingedgeofWCLKwithoutactualwrite  
operations. This function facilitates picture in picture function in a TV system.  
6/23  

与MSM548332相关器件

型号 品牌 描述 获取价格 数据表
MSM548333 OKI 240,384-Word x 8-bit + 240,384-Word x 4-bit Triple Port type Field Memory

获取价格

MSM548512D-10GS OKI Pseudo Static RAM, 512KX8, 100ns, CMOS, PDSO32, 0.525 INCH, PLASTIC, SSOP-32

获取价格

MSM548512D-10RS OKI Pseudo Static RAM, 512KX8, 100ns, CMOS, PDIP32, 0.600 INCH, PLASTIC, DIP-32

获取价格

MSM548512D-12GS OKI Pseudo Static RAM, 512KX8, 120ns, CMOS, PDSO32, 0.525 INCH, PLASTIC, SSOP-32

获取价格

MSM548512D-12RS OKI Pseudo Static RAM, 512KX8, 120ns, CMOS, PDIP32, 0.600 INCH, PLASTIC, DIP-32

获取价格

MSM548512D-80RS OKI Pseudo Static RAM, 512KX8, 80ns, CMOS, PDIP32, 0.600 INCH, PLASTIC, DIP-32

获取价格