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MSM548333 PDF预览

MSM548333

更新时间: 2022-12-13 04:56:09
品牌 Logo 应用领域
冲电气 - OKI 存储
页数 文件大小 规格书
42页 418K
描述
240,384-Word x 8-bit + 240,384-Word x 4-bit Triple Port type Field Memory

MSM548333 数据手册

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E2L0035-17-Y1  
This version: Jan. 1998  
Previous version: Dec. 1996  
¡ Semiconductor  
MSM548333  
240,384-Word ¥ 8-bit + 240,384-Word ¥ 4-bit Triple Port type Field Memory  
DESCRIPTION  
The MSM548333 is a high performance double triple-port type 2.88-Mbit, 768 bits ¥ 313 lines ¥ (8 +  
4), Field Memory for Y-C separation signal control. The MSM548333 has two memory plain blocks:  
Yareahas8plainsandCareahas4plains.Eachplaincontains768¥313bits.Eachplainhasoneinput  
port and two output ports. Access is done line by line. The line address must be set each time a line  
is changed.  
TheMSM548333isespeciallydesignedforhighperformancedigitalcameras, TVs, VTRsandMulti-  
mediaapplicationswhichrequirespecialoperationssuchastime-basecorrection,noisereduction  
and other digital techniques.  
The MSM548333 is not designed for high end use in such applications as medical systems,  
professional graphics systems which require long term picture storage, data storage systems and  
others.  
More than two MSM548333s can be cascaded directly without any delay devices between them.  
Cascading MSM548333s provides larger capacity and longer delay.  
XandYserialaddressinputenablesrandominitialaddresssettingofserialaccessinapage.Other  
than the random address setting, MSM548333 has several types of address set modes such as line  
hold, address jump to initial address and line increment. For example, address jump to initial X  
address and line increment enable block access.  
Self refresh function releases the MSM548333 from being applied external refresh control clocks even  
though it contains dynamic type memory cells. Input enable control or IE pin enables write mask  
function.  
FEATURES  
• Configuration  
6-port configuration  
Y area: 768 ¥ 313 ¥ 8-bit configuration ¥ 1 (serial write port)  
768 ¥ 313 ¥ 8-bit configuration ¥ 2 (serial read port)  
C area: 768 ¥ 313 ¥ 4-bit configuration ¥ 1 (serial write port)  
768 ¥ 313 ¥ 4-bit configuration ¥ 2 (serial read port)  
• Line by line access.  
• X and Y serial address inputs for random serial initial bit address  
• Asynchronous operation  
• Serial read and write cycle times  
Read cycle: 30 ns min.  
Write cycle: 50 ns min.  
• Low operating supply voltage: 3.3 V ±0.3 V  
• Self-refresh.  
• Various address reset mode for picture processing  
• Write mask by IE.  
• Package:  
100-pin plastic TQFP (TQFP100-P-1414-0.50-K)  
(Product : MSM548333TS-K)  
1/42  

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