MSC8103
Rev. 12, 5/2008
Freescale Semiconductor
Technical Data
MSC8103
Network Digital Signal Processor
The Freescale MSC8103
16-bit DSP is a member of
the family of DSPs based
on the StarCore SC140
DSP core. The MSC8103
is available in two core
speed levels: 275 and 300
MHz.
CPM
SIU
64-bit System Bus
Interrupt
3 × FCC
2 × MCC
4 × SCC
2 × SMC
SPI
MEMC
PIT
Controller
UTOPIA
Interface
64/32-bit
System
Bus
Timers
Parallel I/O
System Protection
Reset Control
Clock Control
MII
DMA
Engine
Baud Rate
Generators
•
•
•
SIC_EXT
SIC
Dual Ported
RAM
TDMs
Interrupts
{
Bridge
2 × SDMA
MEMC
What’s New?
Rev. 12 includes the following
changes:
I2C
RISC
64-bit Local Bus
128-bit QBus
Other
Peripherals
Extended Core
PIC
•
Table 2-4 changes V
Q2PPC
Bridge
IL
Interrupts
reference for signal low
input current to 0.8 V.
Address
Register
File
Data ALU
Register
File
Program
Sequencer
Boot
ROM
8/16-bit
Host
Interface
HDI16
Address
ALU
Data
ALU
SC140
Core
SRAM
512 KB
L1 Interface
JTAG
EOnCE™
128-bit P-Bus
64-bit XA Data Bus
64-bit XB Data Bus
Power
Management
Clock/PLL
Figure 1. MSC8103 Block Diagram
The Freescale MSC8103 DSP is a very versatile device that integrates the high-performance SC140 four-ALU
(arithmetic logic unit) DSP core along with 512 KB of internal memory, a communications processor module
(CPM), a 64-bit bus, a very flexible system integration unit (SIU), and a 16-channel DMA engine on a single
device. With its four-ALU core, the MSC8103 can execute up to four multiply-accumulate (MAC) operations in a
single clock cycle. The MSC8103 CPM is a 32-bit RISC-based communications protocol engine that can network
to time-division multiplexed (TDM) highways, Ethernet, and asynchronous transfer mode (ATM) backbones. The
MSC8103 60x-compatible bus interface facilitates its connection to multi-master system architectures. The very
large internal memory, 512 KB, reduces the need for external program and data memories. The MSC8103 offers
1200 DSP MMACS performance using an internal 300 MHz clock with a 1.6 V core and independent 3.3 V
input/output (I/O).
© Freescale Semiconductor, Inc., 2001, 2008. All rights reserved.