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MPC905EF PDF预览

MPC905EF

更新时间: 2024-01-03 10:10:30
品牌 Logo 应用领域
艾迪悌 - IDT 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
8页 326K
描述
Processor Specific Clock Generator, 100MHz, PDSO16, LEAD FREE, PLASTIC, SOIC-16

MPC905EF 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:LEAD FREE, PLASTIC, SOIC-16针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.3
JESD-30 代码:R-PDSO-G16JESD-609代码:e3
长度:9.9 mm湿度敏感等级:3
端子数量:16最高工作温度:70 °C
最低工作温度:最大输出时钟频率:100 MHz
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:3.3 V主时钟/晶体标称频率:100 MHz
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:Clock Generators最大压摆率:95 mA
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Matte Tin (Sn) - annealed端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:3.9 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, PROCESSOR SPECIFICBase Number Matches:1

MPC905EF 数据手册

 浏览型号MPC905EF的Datasheet PDF文件第2页浏览型号MPC905EF的Datasheet PDF文件第3页浏览型号MPC905EF的Datasheet PDF文件第4页浏览型号MPC905EF的Datasheet PDF文件第5页浏览型号MPC905EF的Datasheet PDF文件第6页浏览型号MPC905EF的Datasheet PDF文件第7页 
1:6 PCI Clock Generator/Fanout Buffer  
MPC905  
DATASHEET  
Product Discontinuance Notice – Last Time Buy Expires on (12/7/2013)  
1:6 PCI Clock Generator/  
Fanout Buffer  
The MPC905 is a six output clock generation device targeted to provide the  
clocks required in a 3.3 V or 5.0 V PCI environment. The device operates from a  
3.3 V supply and can interface to either a TTL input or an external crystal. The  
inputs to the device can be driven with 5.0 V when the VCC is at 3.3 V. The  
outputs of the MPC905 meet all of the specifications of the PCI standard.  
1:6 PCI  
CLOCK GENERATOR/  
FANOUT BUFFER  
Features  
Six Low Skew Outputs  
Synchronous Output Enables for Power Management  
Low Voltage Operation  
XTAL Oscillator Interface  
16-Lead SOIC Package  
5.0 V Tolerant Enable Inputs  
Replacement part: ICS83905  
D SUFFIX  
Functional Description  
EF SUFFIX (PB-FREE PACKAGE)  
PLASTIC SOIC PACKAGE  
CASE 751B-05  
The MPC905 device is targeted for PCI bus or processor bus environments  
with up to 12 clock loads. Each of the six outputs on the MPC905 can drive two  
series terminated 50transmission lines. This capability effectively makes the  
MPC905 a 1:12 fanout buffer.  
The MPC905 offers two synchronous enable inputs to allow users flexibility in  
developing power management features for their designs. Both enable signals are active HIGH inputs. A logic ‘0’ on the  
ENABLE1 will pull outputs 0 to 4 into the logic ‘0’ state. A logic ‘1’ on the ENABLE1 input will result in outputs 0 to 4 to be toggling.  
A logic ‘0’ on ENABLE2 will cause output BLK5 to a logic ‘0’ state, whereas a logic ‘1’ on ENABLE2 will cause output BLK5 to  
toggle. The oscillator remains on.  
The ENABLE2 input can be used to disable any high power device for system power savings during periods of inactivity. Both  
enable inputs are synchronized internal to the chip so that the output disabling will happen only when the outputs are already  
LOW. This feature guarantees no runt pulses will be generated during enabling and disabling.  
MPC905 REVISION 4 DECEMBER 18, 2012  
1
©2012 Integrated Device Technology, Inc.  

MPC905EF 替代型号

型号 品牌 替代类型 描述 数据表
83905AGILFT IDT

功能相似

TSSOP-16, Reel
83905AMLF IDT

类似代替

Low Skew, 1:6 Crystal-to- LVCMOS/LVTTL Fanout Buffer
ICS83905AMLF IDT

类似代替

LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER

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