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MPC860TZQ66D4 PDF预览

MPC860TZQ66D4

更新时间: 2024-02-06 16:35:25
品牌 Logo 应用领域
飞思卡尔 - FREESCALE 外围集成电路时钟
页数 文件大小 规格书
80页 2125K
描述
Hardware Specifications

MPC860TZQ66D4 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Transferred零件包装代码:BGA
包装说明:BGA, BGA357,19X19,50针数:357
Reach Compliance Code:not_compliantECCN代码:3A991.A.2
HTS代码:8542.31.00.01风险等级:5.12
Is Samacsys:N地址总线宽度:32
位大小:32边界扫描:YES
最大时钟频率:50 MHz外部数据总线宽度:32
格式:FIXED POINT集成缓存:YES
JESD-30 代码:S-PBGA-B357JESD-609代码:e0
长度:25 mm低功率模式:YES
湿度敏感等级:3端子数量:357
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:BGA封装等效代码:BGA357,19X19,50
封装形状:SQUARE封装形式:GRID ARRAY
峰值回流温度(摄氏度):245电源:3.3 V
认证状态:Not Qualified座面最大高度:2.52 mm
速度:66 MHz子类别:Microprocessors
最大供电电压:3.465 V最小供电电压:3.135 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS端子面层:TIN LEAD
端子形式:BALL端子节距:1.27 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:30
宽度:25 mmuPs/uCs/外围集成电路类型:MICROPROCESSOR, RISC
Base Number Matches:1

MPC860TZQ66D4 数据手册

 浏览型号MPC860TZQ66D4的Datasheet PDF文件第2页浏览型号MPC860TZQ66D4的Datasheet PDF文件第3页浏览型号MPC860TZQ66D4的Datasheet PDF文件第4页浏览型号MPC860TZQ66D4的Datasheet PDF文件第6页浏览型号MPC860TZQ66D4的Datasheet PDF文件第7页浏览型号MPC860TZQ66D4的Datasheet PDF文件第8页 
Maximum Tolerated Ratings  
— Multiple-master environment support  
Time-slot assigner (TSA)  
— Allows SCCs and SMCs to run in multiplexed and/or non-multiplexed operation  
— Supports T1, CEPT, PCM highway, ISDN basic rate, ISDN primary rate, user defined  
— 1- or 8-bit resolution  
— Allows independent transmit and receive routing, frame synchronization, and clocking  
— Allows dynamic changes  
— Can be internally connected to six serial channels (four SCCs and two SMCs)  
Parallel interface port (PIP)  
— Centronics interface support  
— Supports fast connection between compatible ports on the MPC860 or the MC68360  
PCMCIA interface  
— Master (socket) interface, release 2.1 compliant  
— Supports two independent PCMCIA sockets  
— Supports eight memory or I/O windows  
Low power support  
— Full on—all units fully powered  
— Doze—core functional units disabled except time base decrementer, PLL, memory controller, RTC, and  
CPM in low-power standby  
— Sleep—all units disabled except RTC and PIT, PLL active for fast wake up  
— Deep sleep—all units disabled including PLL except RTC and PIT  
— Power down mode—all units powered down except PLL, RTC, PIT, time base, and decrementer  
Debug interface  
— Eight comparators: four operate on instruction address, two operate on data address, and two operate on  
data  
— Supports conditions: = < >  
— Each watchpoint can generate a break-point internally.  
3.3-V operation with 5-V TTL compatibility except EXTAL and EXTCLK  
357-pin ball grid array (BGA) package  
3 Maximum Tolerated Ratings  
This section provides the maximum tolerated voltage and temperature ranges for the MPC860. Table 2 provides the  
maximum ratings.  
This device contains circuitry protecting against damage due to high-static voltage or electrical fields; however, it  
is advised that normal precautions be taken to avoid application of any voltages higher than maximum-rated voltages  
to this high-impedance circuit. Reliability of operation is enhanced if unused inputs are tied to an appropriate logic  
voltage level (for example, either GND or V ).  
dd  
MPC860 Family Hardware Specifications, Rev. 7  
Freescale Semiconductor  
5

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