MM74HCT109J

更新时间： 2024-11-23 23:02:43

品牌	Logo	应用领域
美国国家半导体 - NSC		触发器
页数	文件大小	规格书
4页	117K
描述
Dual J-K Flip-Flops with Preset and Clear

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数据手册

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MM74HCT109J 数据手册

January 1988

MM54HCT109/MM74HCT109

Dual J-K Flip-Flops with Preset and Clear

General Description

These high speed J-K FLIP-FLOPS utilize advanced silicon-

gate CMOS technology. They possess the low power con-

sumption and high noise immunity of standard CMOS inte-

grated circuits, along with the ability to drive 10 LS-TTL

loads.

MM54HCT/MM74HCT devices are intended to interface be-

tween TTL and NMOS components and standard CMOS

devices. These parts are also plug-in replacements for LS-

TTL devices and can be used to reduce power consumption

in existing designs.

Each flip flop has independent J, K, PRESET, CLEAR, and

CLOCK inputs and Q and Q outputs. These devices are

edge sensitive to the clock input and change state on the

positive going transition of the clock pulse. Clear and preset

are independent of the clock and accomplished by a low

logic level on the corresponding input.

Features

Typical propagation delay: 20 ns

Low input current: 1 mA maximum

Low quiescent current: 40 mA maximum (74HCT Series)

Output drive capability: 10 LS-TTL loads

The 54HCT/74HCT logic family is functionally as well as

pin-out compatible with the standard 54LS/74LS logic fami-

ly. All inputs are protected from damage due to static dis-

charge by internal diode clamps to V

and ground.

Connection and Logic Diagrams

Function Table

Dual-In-Line Package

Inputs

CLK

Outputs

CLR

TOGGLE

Order Number MM54HCT109 or MM74HCT109

TL/F/5361–1

TL/F/5361–2

1995 National Semiconductor Corporation

TL/F/5361

RRD-B30M105/Printed in U. S. A.

12 3 4

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MM74HCT112N/A+	TI	获取价格	IC,FLIP-FLOP,DUAL,J/K TYPE,HCT-CMOS,DIP,16PIN,PLASTIC