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MM74HCT138N_NL PDF预览

MM74HCT138N_NL

更新时间： 2024-11-27 19:58:55
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 输入元件光电二极管
页数 文件大小 规格书
7页 71K
描述
Decoder/Driver, HCT Series, Inverted Output, CMOS, PDIP16, 0.300 INCH, LEAD FREE, PLASTIC, MS-001, DIP-16

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MM74HCT138N_NL 技术参数

生命周期：Obsolete零件包装代码：DIP
包装说明：DIP,针数：16
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.66
其他特性：3 ENABLE INPUTS系列：HCT
输入调节：LATCHEDJESD-30 代码：R-PDIP-T16
JESD-609代码：e3长度：19.305 mm
功能数量：1端子数量：16
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：INVERTED
封装主体材料：PLASTIC/EPOXY封装代码：DIP
封装形状：RECTANGULAR封装形式：IN-LINE
传播延迟（tpd）：60 ns认证状态：Not Qualified
座面最大高度：5.08 mm最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：NO技术：CMOS
温度等级：INDUSTRIAL端子面层：MATTE TIN
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL宽度：7.62 mm
Base Number Matches：1

MM74HCT138N_NL 数据手册

 浏览型号MM74HCT138N_NL的Datasheet PDF文件第2页浏览型号MM74HCT138N_NL的Datasheet PDF文件第3页浏览型号MM74HCT138N_NL的Datasheet PDF文件第4页浏览型号MM74HCT138N_NL的Datasheet PDF文件第5页浏览型号MM74HCT138N_NL的Datasheet PDF文件第6页浏览型号MM74HCT138N_NL的Datasheet PDF文件第7页 
February 1984  
Revised February 1999  
MM74HCT138  
3-to-8 Line Decoder  
the 74LS138. All inputs are protected from damage due to  
static discharge by diodes to VCC and ground.  
General Description  
The MM74HCT138 decoder utilizes advanced silicon-gate  
CMOS technology, and are well suited to memory address  
decoding or data routing applications. Both circuits feature  
high noise immunity and low power consumption usually  
associated with CMOS circuitry, yet have speeds compara-  
ble to low power Schottky TTL logic.  
MM74HCT devices are intended to interface between TTL  
and NMOS components and standard CMOS devices.  
These parts are also plug-in replacements for LS-TTL  
devices and can be used to reduce power consumption in  
existing designs.  
The MM74HCT138 have 3 binary select inputs (A, B, and  
C). If the device is enabled these inputs determine which  
one of the eight normally HIGH outputs will go LOW. Two  
active LOW and one active HIGH enables (G1, G2A and  
G2B) are provided to ease the cascading decoders.  
Features  
■ TTL input compatible  
■ Typical propagation delay: 20 ns  
■ Low quiescent current: 80 µA maximum (74HCT Series)  
■ Low input current: 1 µA maximum  
■ Fanout of 10 LS-TTL loads  
The decoders’ output can drive 10 low power Schottky TTL  
equivalent loads and are functionally and pin equivalent to  
Ordering Code:  
Order Number  
MM74HCT138M  
MM74HCT138SJ  
MM74HCT138MTC  
MM74HCT138N  
Package Number  
M16A  
Package Description  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
M16D  
MTC16  
N16E  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Pin Assignments for DIP, SOIC, SOP and TSSOP  
© 1999 Fairchild Semiconductor Corporation  
DS005362.prf  
www.fairchildsemi.com  
1234567

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MM74HCT138N_NL 替代型号

型号 品牌 替代类型 描述 数据表
MC74HCT138ANG ONSEMI

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MM74HCT139N/A+ TI

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