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MM74HCT138MTCX PDF预览

MM74HCT138MTCX

更新时间: 2024-11-25 11:14:11
品牌 Logo 应用领域
安森美 - ONSEMI 解码器
页数 文件大小 规格书
8页 233K
描述
3-8 线路解码器

MM74HCT138MTCX 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:TSSOP, TSSOP16,.25
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:0.54其他特性:3 ENABLE INPUTS
系列:HCTJESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:5 mm
负载电容(CL):50 pF逻辑集成电路类型:OTHER DECODER/DRIVER
最大I(ol):0.004 A湿度敏感等级:1
功能数量:1端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 VProp。Delay @ Nom-Sup:50 ns
传播延迟(tpd):60 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Decoder/Drivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

MM74HCT138MTCX 数据手册

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DATA SHEET  
www.onsemi.com  
3-to-8 Line Decoder  
MM74HCT138  
SOIC−16  
CASE 751B−05/751BG−01  
General Description  
The MM74HCT138 decoder utilizes advanced silicon−gate CMOS  
technology, and are well suited to memory address decoding or data  
routing applications. Both circuits feature high noise immunity and  
low power consumption usually associated with CMOS circuitry, yet  
have speeds comparable to low power Schottky TTL logic.  
The MM74HCT138 have 3 binary select inputs (A, B, and C). If the  
device is enabled these inputs determine which one of the eight  
normally HIGH outputs will go LOW. Two active LOW and one  
active HIGH enables (G1, G2A and G2B) are provided to ease the  
cascading decoders.  
The decoders’ output can drive 10 low power Schottky TTL  
equivalent loads and are functionally and pin equivalent to the  
74LS138. All inputs are protected from damage due to static discharge  
by diodes to VCC and ground.  
MM74HCT devices are intended to interface between TTL and  
NMOS components and standard CMOS devices. These parts are also  
plug−in replacements for LS−TTL devices and can be used to reduce  
power consumption in existing designs.  
16  
1
TSSOP−16  
CASE 948F−01  
MARKING DIAGRAM  
HCT138A  
AWLYWW  
SOIC−16  
16  
HCT  
138A  
ALYW  
Features  
1
TTL Input Compatible  
TSSOP−16  
Typical Propagation Delay: 20 ns  
Low Quiescent Current: 160 mA Maximum (74HCT Series)  
Low Input Current: 1 mA Maximum  
Fanout of 10 LS−TTL Loads  
These are Pb−Free Devices  
HCT138A = Specific Device Code  
A
WL, L  
Y
= Assembly Location  
= Wafer Lot  
= Year  
WW, W = Work Week  
Connection Diagram  
ORDERING INFORMATION  
See detailed ordering and shipping information on page 4 of  
this data sheet.  
Top View  
Figure 1. Pin Assignments for SOIC and TSSOP  
© Semiconductor Components Industries, LLC, 1999  
1
Publication Order Number:  
November, 2022 − Rev. 1  
MM74HCT138/D  

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