是否Rohs认证: | 不符合 | 生命周期: | Obsolete |
包装说明: | DIP, DIP14,.3 | Reach Compliance Code: | unknown |
HTS代码: | 8542.39.00.01 | 风险等级: | 5.82 |
Is Samacsys: | N | 其他特性: | MASTER SLAVE OPERATION |
系列: | HC/UH | JESD-30 代码: | R-GDIP-T14 |
JESD-609代码: | e0 | 长度: | 19.43 mm |
负载电容(CL): | 50 pF | 逻辑集成电路类型: | J-K FLIP-FLOP |
最大频率@ Nom-Sup: | 21000000 Hz | 最大I(ol): | 0.004 A |
位数: | 2 | 功能数量: | 2 |
端子数量: | 14 | 最高工作温度: | 85 °C |
最低工作温度: | -40 °C | 输出极性: | COMPLEMENTARY |
封装主体材料: | CERAMIC, GLASS-SEALED | 封装代码: | DIP |
封装等效代码: | DIP14,.3 | 封装形状: | RECTANGULAR |
封装形式: | IN-LINE | 峰值回流温度(摄氏度): | NOT SPECIFIED |
电源: | 2/6 V | 传播延迟(tpd): | 160 ns |
认证状态: | Not Qualified | 座面最大高度: | 5.08 mm |
子类别: | FF/Latches | 最大供电电压 (Vsup): | 6 V |
最小供电电压 (Vsup): | 2 V | 标称供电电压 (Vsup): | 4.5 V |
表面贴装: | NO | 技术: | CMOS |
温度等级: | INDUSTRIAL | 端子面层: | Tin/Lead (Sn/Pb) |
端子形式: | THROUGH-HOLE | 端子节距: | 2.54 mm |
端子位置: | DUAL | 处于峰值回流温度下的最长时间: | NOT SPECIFIED |
触发器类型: | NEGATIVE EDGE | 宽度: | 7.62 mm |
最小 fmax: | 25 MHz | Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
MM74HC73J/A+ | NSC |
获取价格 |
IC,FLIP-FLOP,DUAL,J/K TYPE,HC-CMOS,DIP,14PIN,CERAMIC | |
MM74HC73J/A+ | TI |
获取价格 |
IC,FLIP-FLOP,DUAL,J/K TYPE,HC-CMOS,DIP,14PIN,CERAMIC | |
MM74HC73M | TI |
获取价格 |
HC/UH SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, PL | |
MM74HC73M | NSC |
获取价格 |
IC HC/UH SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, | |
MM74HC73M/A+ | TI |
获取价格 |
IC,FLIP-FLOP,DUAL,J/K TYPE,HC-CMOS,SOP,14PIN,PLASTIC | |
MM74HC73MX | ROCHESTER |
获取价格 |
HC/UH SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, PL | |
MM74HC73MX | TI |
获取价格 |
HC/UH SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, PL | |
MM74HC73N | NSC |
获取价格 |
Dual J-K Flip-Flops with Clear | |
MM74HC73N/A+ | NSC |
获取价格 |
IC,FLIP-FLOP,DUAL,J/K TYPE,HC-CMOS,DIP,14PIN,PLASTIC | |
MM74HC73N/A+ | TI |
获取价格 |
IC,FLIP-FLOP,DUAL,J/K TYPE,HC-CMOS,DIP,14PIN,PLASTIC |