MM74HC175

更新时间： 2024-11-20 23:02:43

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		触发器
页数	文件大小	规格书
7页	79K
描述
Quad D-Type Flip-Flop With Clear

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

MM74HC175 数据手册

September 1983

Revised February 1999

MM74HC175

Quad D-Type Flip-Flop With Clear

The 74HC logic family is functionally as well as pin-out

compatible with the standard 74LS logic family. All inputs

are protected from damage due to static discharge by inter-

nal diode clamps to V_CCand ground.

General Description

The MM74HC175 high speed D-type flip-flop with comple-

mentary outputs utilizes advanced silicon-gate CMOS

technology to achieve the high noise immunity and low

power consumption of standard CMOS integrated circuits,

along with the ability to drive 10 LS-TTL loads.

Features

■ Typical propagation delay: 15 ns

Information at the D inputs of the MM74HC175 is trans-

ferred to the Q and Q outputs on the positive going edge of

the clock pulse. Both true and complement outputs from

each flip flop are externally available. All four flip-flops are

controlled by a common clock and a common CLEAR.

■ Wide operating supply voltage range: 2–6V

■ Low input current: 1 µA maximum

■ Low quiescent supply current: 80 µA maximum (74HC)

■ High output drive current: 4 mA minimum (74HC)

Clearing is accomplished by

a negative pulse at the

CLEAR input. All four Q outputs are cleared to a logical “0”

and all four Q outputs to a logical “1.”

Ordering Code:

Order Number Package Number

Package Description

MM74HC175M

MM74HC175SJ

MM74HC175MTC

MM74HC175N

M16A

M16D

MTC16

N16E

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Truth Table

(Each Flip-Flop)

Inputs

Pin Assignments for DIP, SOIC, SOP and TSSOP

Outputs

Clear

Clock

↑

Q₀

H = HIGH Level (steady state)

L = LOW Level (steady state)

X = Irrelevant

↑ = Transition from LOW-to-HIGH level

= The level of Q before the indicated steady-state input conditions were

established

Top View

DS005319.prf

www.fairchildsemi.com

12 3 4 5 6 7

中文翻译

下载PDF

与MM74HC175相关器件

型号	品牌	获取价格	描述	数据表
MM74HC175J	NSC	获取价格	IC,FLIP-FLOP,QUAD,D TYPE,HC-CMOS,DIP,16PIN,CERAMIC
MM74HC175J/A+	NSC	获取价格	IC,FLIP-FLOP,QUAD,D TYPE,HC-CMOS,DIP,16PIN,CERAMIC
MM74HC175M	FAIRCHILD	获取价格	Quad D-Type Flip-Flop With Clear
MM74HC175M	ONSEMI	获取价格	带清零功能的四通道 D 型触发器
MM74HC175M/A+	NSC	获取价格	IC,FLIP-FLOP,QUAD,D TYPE,HC-CMOS,SOP,16PIN,PLASTIC
MM74HC175M_NL	FAIRCHILD	获取价格	D Flip-Flop, HC/UH Series, 1-Func, Positive Edge Triggered, 4-Bit, Complementary Output, C
MM74HC175MTC	FAIRCHILD	获取价格	Quad D-Type Flip-Flop With Clear
MM74HC175MTCX	ONSEMI	获取价格	带清零功能的四通道 D 型触发器
MM74HC175MX	FAIRCHILD	获取价格	D Flip-Flop, HC/UH Series, 1-Func, Positive Edge Triggered, 4-Bit, Complementary Output, C
MM74HC175MX	ONSEMI	获取价格	带清零功能的四通道 D 型触发器

与MM74HC175相关文章

解析光耦仿真器：升级光耦合器技术的必要性
2024-11-18

28
英伟达新一代Blackwell GPU过热问题致交付延迟
2024-11-18

21
国产厂商思特威CMOS图像传感器芯片单月出货超1亿颗，技术创新引领行业发展
2024-11-14

50
台积电5nm和3nm产能利用率达100%，半导体行业景气度持续攀升
2024-11-14

48

产品中心

服务支持

精选活动

关于我们

帮助中心

MM74HC175

MM74HC175 数据手册

与MM74HC175相关器件

与MM74HC175相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

MM74HC175

MM74HC175 数据手册

与MM74HC175相关器件

与MM74HC175相关文章

您还可以找

您在本页遇到什么问题？