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MM74HC181N/B+ PDF预览

MM74HC181N/B+

更新时间: 2024-11-09 12:58:47
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
10页 154K
描述
IC,FIXED POINT ALU,HC-CMOS,DIP,24PIN,PLASTIC

MM74HC181N/B+ 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP, DIP24,.3Reach Compliance Code:unknown
风险等级:5.92JESD-30 代码:R-PDIP-T24
JESD-609代码:e0逻辑集成电路类型:ARITHMETIC LOGIC UNIT
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP24,.3
封装形状:RECTANGULAR封装形式:IN-LINE
电源:2/6 V认证状态:Not Qualified
子类别:Arithmetic Circuits表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
Base Number Matches:1

MM74HC181N/B+ 数据手册

 浏览型号MM74HC181N/B+的Datasheet PDF文件第2页浏览型号MM74HC181N/B+的Datasheet PDF文件第3页浏览型号MM74HC181N/B+的Datasheet PDF文件第4页浏览型号MM74HC181N/B+的Datasheet PDF文件第5页浏览型号MM74HC181N/B+的Datasheet PDF文件第6页浏览型号MM74HC181N/B+的Datasheet PDF文件第7页 
January 1988  
MM54HC181/MM74HC181  
Arithmetic Logic Units/Function Generators  
General Description  
These arithmetic logic units (ALU)/function generators uti-  
lize advanced silicon-gate CMOS technology. They possess  
the high noise immunity and low power consumption of  
standard CMOS integrated circuits, as well as the ability to  
drive 10 LS-TTL loads.  
If high speed is not of importance, a ripple-carry input (C )  
n
a
and a ripple-carry output (C  
4) are available. However,  
n
the ripple-carry delay has also been minimized so that arith-  
metic manipulations for small word lengths can be per-  
formed without external circuitry.  
The MM54HC181/MM74HC181 are arithmetic logic unit  
(ALU)/function generators that have a complexity of 75  
equivalent gates on a monolithic chip. These circuits per-  
form 16 binary arithmetic operations on two 4-bit words as  
shown in Tables 1 and 2. These operations are selected by  
the four function-select lines (S0, S1, S2, S3) and include  
addition, subtraction, decrement, and straight transfer.  
When performing arithmetic manipulations, the internal car-  
ries must be enabled by applying a low-level voltage to the  
mode control input (M). A full carry look-ahead scheme is  
made available in these devices for fast, simultaneous carry  
generation by means of two cascade-outputs (pins 15 and  
17) for the four bits in the package. When used in conjunc-  
tion with the MM54HC182 or MM74HC182, full carry look-  
ahead circuits, high-speed arithmetic operations can be per-  
formed. The method of cascading HC182 circuits with these  
ALU’s to provide multi-level full carry look-ahead is illustrat-  
ed under typical applications data for the MM54HC182/  
MM74HC182.  
Features  
Y
Full look-ahead for high-speed operations on  
long words  
Y
Arithmetic operating modes:  
Addition  
Subtraction  
Shift operand a one position magnitude comparison  
Plus twelve other arithmetic operations  
Y
Logic function modes:  
Exclusive-OR  
Comparator  
AND, NAND, OR, NOR  
Plus ten other logic operations  
Y
Wide operating voltage range: 2V6V  
Y
Low input current: 1 mA maximum  
Y
Low quiescent current: 80 mA maximum  
Connection Diagram  
Pin Designations  
Dual-In-Line Package  
Designation  
A3, A2, A1, A0  
B3, B2, B1, B0  
Pin Nos.  
Function  
19, 21, 23, 2  
18, 20, 22, 1  
Word A Inputs  
Word B Inputs  
Function-Select  
Inputs  
S3, S2, S1, S0  
3, 4, 5, 6  
C
7
8
Inv. Carry Input  
n
Mode Control  
Input  
M
F3, F2, F1, F0  
13, 11, 10, 9  
14  
Function Outputs  
e
A
B
Comparator Outputs  
Carry Propagate  
Output  
P
15  
16  
17  
a
C
4
Inv. Carry Output  
n
Carry Generate  
Output  
G
V
24  
12  
Supply Voltage  
Ground  
TL/F/5320–1  
CC  
Top View  
GND  
Order Number MM54HC181 or MM74HC181  
C
1995 National Semiconductor Corporation  
TL/F/5320  
RRD-B30M105/Printed in U. S. A.  

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