MM74HC03J

更新时间： 2024-11-24 04:39:31

品牌	Logo	应用领域
美国国家半导体 - NSC		栅
页数	文件大小	规格书
4页	129K
描述
Open Drain NAND Gate

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数据手册

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MM74HC03J 数据手册

January 1988

MM54HC03/MM74HC03 Quad 2-Input

Open Drain NAND Gate

General Description

Features

Typical propagation delay: 12 ns

These NAND gates utilize advanced silicon-gate CMOS

technology to achieve operating speeds similar to LS-TTL

gates with the low power consumption of standard CMOS

integrated circuits. All gates have buffered outputs. All de-

vices have high noise immunity and the ability to drive 10

LS-TTL loads. The 54HC/74HC logic family is functionally

as well as pin-out compatible with the standard 54LS/74LS

logic family. All inputs are protected from damage due to

Wide power supply range: 2–6V

Low quiescent current: 20 mA maximum (74HC Series)

Low input current: 1 mA maximum

Fanout of 10 LS-TTL loads

static discharge by internal diode clamps to

ground.

and

As with standard 54HC/74HC push-pull outputs there are

diodes to both V and ground. Therefore the output should

as it would be clamped to one

not be pulled above V

diode voltage above V . This diode is added to enhance

electrostatic protection.

Connection and Logic Diagrams

Dual-In-Line Package

TL/F/5295–1

Top View

Order Number MM54HC03 or MM74HC03

TL/F/5295–2

1995 National Semiconductor Corporation

TL/F/5295

RRD-B30M105/Printed in U. S. A.

12 3 4

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