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MM74C922N PDF预览

MM74C922N

更新时间: 2024-11-04 22:46:07
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 运算电路逻辑集成电路光电二极管编码器PC
页数 文件大小 规格书
10页 116K
描述
16-Key Encoder 20-Key Encoder

MM74C922N 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:DIP
包装说明:DIP, DIP18,.3针数:18
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.69
Samacsys Confidence:4Samacsys Status:Released
Samacsys PartID:552692Samacsys Pin Count:18
Samacsys Part Category:Integrated CircuitSamacsys Package Category:Dual-In-Line Packages
Samacsys Footprint Name:18-Lead PDIP N18BSamacsys Released Date:2016-11-18 09:30:12
Is Samacsys:N其他特性:16 KEY ENCODERS
系列:CMOSJESD-30 代码:R-PDIP-T18
JESD-609代码:e3长度:22.73 mm
逻辑集成电路类型:ENCODER位数:8
功能数量:1端子数量:18
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP18,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT APPLICABLE电源:5/15 V
传播延迟(tpd):150 ns认证状态:Not Qualified
座面最大高度:5.33 mm子类别:Arithmetic Circuits
最大供电电压 (Vsup):15 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT APPLICABLE宽度:7.62 mm
Base Number Matches:1

MM74C922N 数据手册

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October 1987  
Revised January 1999  
MM74C922 • MM74C923  
16-Key Encoder • 20-Key Encoder  
An internal register remembers the last key pressed even  
after the key is released. The 3-STATE outputs provide for  
easy expansion and bus operation and are LPTTL compat-  
ible.  
General Description  
The MM74C922 and MM74C923 CMOS key encoders pro-  
vide all the necessary logic to fully encode an array of  
SPST switches. The keyboard scan can be implemented  
by either an external clock or external capacitor. These  
encoders also have on-chip pull-up devices which permit  
switches with up to 50 kon resistance to be used. No  
diodes in the switch array are needed to eliminate ghost  
switches. The internal debounce circuit needs only a single  
external capacitor and can be defeated by omitting the  
capacitor. A Data Available output goes to a high level  
when a valid keyboard entry has been made. The Data  
Available output returns to a low level when the entered  
key is released, even if another key is depressed. The Data  
Available will return high to indicate acceptance of the new  
key after a normal debounce period; this two-key roll-over  
is provided between any two switches.  
Features  
50 kmaximum switch on resistance  
On or off chip clock  
On-chip row pull-up devices  
2 key roll-over  
Keybounce elimination with single capacitor  
Last key register at outputs  
3-STATE output LPTTL compatible  
Wide supply range: 3V to 15V  
Low power consumption  
Ordering Code:  
Order Number  
MM74C922N  
Package Number  
N18A  
Package Description  
18-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
MM74C922WM  
MM74C923WM  
MM74C923N  
M20B  
M20B  
N20A  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Connection Diagrams  
Pin Assignment for DIP  
Pin Assignment for SOIC  
Top View  
MM74C922  
Top View  
MM94C922  
© 1999 Fairchild Semiconductor Corporation  
DS006037.prf  
www.fairchildsemi.com  

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