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MD3872DB1 PDF预览

MD3872DB1

更新时间: 2024-11-04 12:36:31
品牌 Logo 应用领域
超科 - SUPERTEX /
页数 文件大小 规格书
13页 1770K
描述
MD3872 Front-End Ultrasound Receiver Demoboard

MD3872DB1 数据手册

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Supertex inc.  
MD3872DB1  
MD3872 Front-End Ultrasound Receiver Demoboard  
Introduction  
General Description  
The MD3872 is a low power and low noise eight-channel The MD3872DB1 provides a very useful platform to evaluate  
front-end receiver for medical ultrasound imaging. Its excel- thislowpower and low noise 12-bit resolutionADC ultrasound  
lent low power dynamic performance is especially suitable front-end receiver. Simply connect a 5V power supply to the  
for portable ultrasound applications. Each channel’s circuit is board and a USB cable to your computer.  
composed of a 14dB/18dB low noise pre-amplifier (LNA), a  
voltage-controlled attenuator (VCA or TGC), a programma-  
The on-board MD3872 and T/R switch ICs, TGC, DAC,  
FPGA, de-serialized LVDS, clock generator, DDR2 data  
ble gain amplifier (PGA), an anti-aliasing filter (AAF) and an  
memory, isolated USB interface, JTAG SPI connector,  
analog-to-digital (ADC) converter. The gain and gain range  
RS232 serial interface and low noise DC/DC power supplies  
of the VGA can be digitally configured separately. The gain  
make a stand alone, desktop 8-channel ultrasound receiver  
of the PGA can be set to one of four discrete values: 23.5dB,  
data acquisition evaluation system.  
29dB, 34.5dB or 40dB. The VCA can be continuously varied  
by a control voltage from -47dB to a maximum of 0dB.  
The MD3872DB1 package includes the demoboard  
power supply cable, USB cable, software driver and PC  
user interface software files. All software files including  
the EEPROM file, FPGA configuration file and PC user  
driven by the LNA to generate differential output current.  
In CW mode, an integrated trans-conductance amplifier is  
interface software files are web downloadable for updating  
if necessary.  
The resulting signal currents of each channel then connect  
to an 8×8 differential cross-point switch which can be pro-  
grammed through the SPI. The 12-bit ADC is based on a  
pipeline structure to provide high static linearity. The data,  
clock, and frame alignment signal outputs are serial LVDS in  
binary format for each channel.  
This datasheet describes the detail of the built-in hardware  
features and PC interface software installation and step by  
step operation of the board..  
Block Diagram  
Doc.# DSDB-MD3872DB1  
A051713  
Supertex inc.  
www.supertex.com  

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