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MCP6N11-001 PDF预览

MCP6N11-001

更新时间: 2024-11-01 12:46:39
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美国微芯 - MICROCHIP 仪表放大器
页数 文件大小 规格书
50页 5689K
描述
500 kHz, 800 μA Instrumentation Amplifier

MCP6N11-001 数据手册

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MCP6N11  
500 kHz, 800 µA Instrumentation Amplifier  
Features  
Description  
• Rail-to-Rail Input and Output  
Microchip Technology Inc. offers the single MCP6N11  
instrumentation amplifier (INA) with Enable/VOS Cali-  
bration pin (EN/CAL) and several minimum gain  
options. It is optimized for single-supply operation with  
rail-to-rail input (no common mode crossover distor-  
tion) and output performance.  
• Gain Set by 2 External Resistors  
• Minimum Gain (GMIN) Options:  
1, 2, 5, 10 or 100 V/V  
• Common Mode Rejection Ratio (CMRR): 115 dB  
(typical, GMIN = 100)  
Two external resistors set the gain, minimizing gain  
error and drift-over temperature. The reference voltage  
(VREF) shifts the output voltage (VOUT).  
• Power Supply Rejection Ratio (PSRR): 112 dB  
(typical, GMIN = 100)  
• Bandwidth: 500 kHz (typical, Gain = GMIN  
• Supply Current: 800 μA/channel (typical)  
• Single Channel  
)
The supply voltage range (1.8V to 5.5V) is low enough  
to support many portable applications. All devices are  
fully specified from -40°C to +125°C.  
• Enable/VOS Calibration pin: (EN/CAL)  
• Power Supply: 1.8V to 5.5V  
These parts have five minimum gain options (1, 2, 5, 10  
and 100 V/V). This allows the user to optimize the input  
offset voltage and input noise for different applications.  
• Extended Temperature Range: -40°C to +125°C  
Typical Applications  
Typical Application Circuit  
• High Side Current Sensor  
• Wheatstone Bridge Sensors  
• Difference Amplifier with Level Shifting  
• Power Control Loops  
VBAT  
+1.8V  
to  
10 Ω  
IDD  
VDD  
U1  
+5.5V  
MCP6N11  
VOUT  
Design Aids  
RF  
• Microchip Advanced Part Selector (MAPS)  
• Demonstration Board  
200 kΩ  
VFG  
RG  
10 kΩ  
• Application Notes  
VREF  
Block Diagram  
Package Types  
VDD VSS  
VOUT  
MCP6N11  
MCP6N11  
2×3 TDFN *  
VOUT  
RM4  
SOIC  
I4  
RF  
VFG  
V
V
EN/CAL  
V
EN/CAL  
1
2
8
7
1
2
8
7
FG  
FG  
GM2  
RG  
Σ
V
V
V
V
EP  
9
IM  
DD  
IM  
DD  
VREF  
I2  
I3  
VREF  
VIP  
V
V
3
4
6
5
V
V
3
4
6
5
IP  
OUT  
IP  
OUT  
I1  
V
V
SS  
REF  
V
SS  
REF  
GM3  
VTR  
Low Power  
VIP  
VIM  
GM1  
POR  
* Includes Exposed Thermal Pad (EP); see Table 3-1.  
VIM  
VOS Calibration  
EN/CAL  
© 2011 Microchip Technology Inc.  
DS25073A-page 1  

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