5秒后页面跳转
MCM69R737A PDF预览

MCM69R737A

更新时间: 2024-01-28 04:00:37
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA /
页数 文件大小 规格书
20页 216K
描述
4M Late Write LVTTL

MCM69R737A 数据手册

 浏览型号MCM69R737A的Datasheet PDF文件第2页浏览型号MCM69R737A的Datasheet PDF文件第3页浏览型号MCM69R737A的Datasheet PDF文件第4页浏览型号MCM69R737A的Datasheet PDF文件第5页浏览型号MCM69R737A的Datasheet PDF文件第6页浏览型号MCM69R737A的Datasheet PDF文件第7页 
Order this document  
by MCM69R737A/D  
SEMICONDUCTOR TECHNICAL DATA  
MCM69R737A  
MCM69R819A  
Advance Information  
4M Late Write LVTTL  
TheMCM69R737A/819Aisa4megabitsynchronouslatewritefaststaticRAM  
designed to provide high performance in secondary cache and ATM switch,  
Telecom, and other high speed memory applications. The MCM69R819A  
organized as 256K words by 18 bits, and the MCM69R737A organized as 128K  
words by 36 bits wide are fabricated in Motorola’s high performance silicon gate  
BiCMOS technology.  
The differential CK clock inputs control the timing of read/write operations of  
the RAM. At the rising edge of the CK clock all addresses, write enables, and  
synchronous selects are registered. An internal buffer and special logic enable  
the memory to accept write data on the rising edge of the CK clock a cycle after  
address and control signals. Read data is driven on the rising edge of the CK  
clock also.  
ZP PACKAGE  
PBGA  
CASE 999–01  
The RAM uses LVTTL 3.3 V inputs and outputs.  
The synchronous write and byte enables allow writing to individual bytes or the  
entire word.  
Byte Write Control  
Single 3.3 V + 10%, – 5% Operation  
LVTTL 3.3 V I/O (V  
Register to Register Synchronous Operation  
Asynchronous Output Enable  
Boundary Scan (JTAG) IEEE 1149.1 Compatible  
Differential Clock Inputs  
Optional x 18 or x 36 organization  
MCM69R737A/819A–5 = 5 ns  
)
DDQ  
MCM69R737A/819A–6 = 6 ns  
MCM69R737A/819A–7 = 7 ns  
MCM69R737A/819A–8 = 8 ns  
Sleep Mode Operation (ZZ Pin)  
119 Bump, 50 mil (1.27 mm) Pitch, 14 mm x 22 mm Plastic Ball Grid Array  
(PBGA) Package  
This document contains information on a new product. Specifications and information herein are subject to change without notice.  
REV 1  
8/13/97  
Motorola, Inc. 1997  

与MCM69R737A相关器件

型号 品牌 获取价格 描述 数据表
MCM69R737AZP5 MOTOROLA

获取价格

4M Late Write LVTTL
MCM69R737AZP5 NXP

获取价格

IC,SYNC SRAM,128KX36,BICMOS-TTL,BGA,119PIN,PLASTIC
MCM69R737AZP5R MOTOROLA

获取价格

4M Late Write LVTTL
MCM69R737AZP5R NXP

获取价格

128KX36 LATE-WRITE SRAM, 2.5ns, PBGA119, 14 X 22 MM, 1.27 MM PITCH, PLASTIC, BGA-119
MCM69R737AZP6 MOTOROLA

获取价格

4M Late Write LVTTL
MCM69R737AZP6R MOTOROLA

获取价格

4M Late Write LVTTL
MCM69R737AZP7 NXP

获取价格

IC,SYNC SRAM,128KX36,BICMOS-TTL,BGA,119PIN,PLASTIC
MCM69R737AZP7 MOTOROLA

获取价格

4M Late Write LVTTL
MCM69R737AZP7R MOTOROLA

获取价格

4M Late Write LVTTL
MCM69R737AZP7R NXP

获取价格

128KX36 LATE-WRITE SRAM, 3.5ns, PBGA119, 14 X 22 MM, 1.27 MM PITCH, PLASTIC, BGA-119