Datasheet > MCM64100-60

MCM64100-60

更新时间： 2024-11-24 14:53:15

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		/
页数	文件大小	规格书
4页	92K
描述
Memory IC

阅读下载

中文翻译

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

MCM64100-60 技术参数

生命周期：	Obsolete	Reach Compliance Code：	unknown
风险等级：	5.84	Base Number Matches：	1

MCM64100-60 数据手册

Order this document

by MCM64100/D

SEMICONDUCTOR

TECHNICAL DATA

MCM64100

Product Preview

1M x 64 Bit Dynamic Random

Access Memory Module

The MCM64100 is a dynamic random access memory (DRAM) module organized

as 1,048,576 x 64 bits. The module is a JEDEC-standard 168-lead dual-in-line

memory module (DIMM) with 84 separate contacts per side, consisting of sixteen

MCM54400A DRAMs housed in 300-mil thin small outline packages (TSOP),

mounted on a substrate along with a 0.22 µF (min) decoupling capacitor mounted

adjacent to each DRAM. Buffering is provided for address and all clock pins except

RAS. The MCM54400A is a CMOS high speed dynamic random access memory

organized as 1,048,576 four-bit words and fabricated with CMOS silicon-gate pro-

cess technology.

•

Three-State Data Output

Early-Write Common I/O Capability

Fast Page Mode Capability

TTL-Compatible Inputs and Outputs

RAS-Only Refresh

CAS Before RAS Refresh

Hidden Refresh

2048 Cycle Refresh: 16 ms (Max)

Consists of Sixteen 1M x 4 DRAMs, Sixteen 0.22 µF (Min) Decoupling Capacitors,

and Two 20-Bit Buffers

•

Unlatched Data Out at Cycle End Allows Two Dimensional Chip Selection

Presence Detect Enable (PDE) Controls Access to 8 Bits of Buffered PD

Information

•

Notch Keys Prevent Accidental Insertion in Low Voltage (3.3 V) Systems

Fast Access Time (t

RAC

): MCM64100-60 = 60 ns (Max)

MCM64100-70 = 70 ns (Max)

•

Low Active Power Dissipation: MCM64100-60 = 10.89 W (Max)

MCM64100-70 = 9.13 W (Max)

Low Standby Power Dissipation: TTL Levels = 193 mW (Max)

CMOS Levels = 105 mW (Max)

PIN NAMES

A0, B0, A1 – A9 . . . . . . . . . Address Inputs

CAS0 – CAS7 . . Column Address Strobe

WE0, WE2 . . . . . . . . . . . . . . . Write Enable

PD1 – PD8 . . . Buffered Presence Detect

PDE . . . . Presence Detect Output Enable

DQ0 – DQ70* . . . . . . . . Data Input/Output

RAS0, RAS2 . . . . . . Row Address Strobe

OE0, OE2 . . . . . . . . . . . . . . Output Enable

ID0, ID1 . . . . . . . . . . . . . Unbuffered ID Bit

. . . . . . . . . . . . . . . . . . . Power (+ 5 V)

NC . . . . . . . . . . . . . . . . . . . No Connection

. . . . . . . . . . . . . . . . . . . . . . . . . Ground

*DQ8, DQ17, DQ26, DQ35, DQ44, DQ53, and DQ62 are not present on 64 bit modules.

This document contains information on a new product under development. Motorola reserves the right to change or discontinue this product without notice.

3/94

Motorola, Inc. 1994

MOTOROLA DRAM

MCM64100

12 3 4

中文翻译

下载PDF

与MCM64100-60相关器件

型号	品牌	获取价格	描述	数据表
MCM6410070	MOTOROLA	获取价格	1MX64 FAST PAGE DRAM MODULE, 70ns, DMA168, DIMM-168
MCM64100-70	MOTOROLA	获取价格	Memory IC
MCM64400	MOTOROLA	获取价格	Memory IC
MCM6440060	MOTOROLA	获取价格	Fast Page DRAM Module, 4MX64, 60ns, CMOS, DIMM-168
MCM6440070	MOTOROLA	获取价格	4MX64 FAST PAGE DRAM MODULE, 70ns, DMA168, DIMM-168
MCM64400BN50	MOTOROLA	获取价格	暂无描述
MCM64400BN50R2	MOTOROLA	获取价格	1MX4 FAST PAGE DRAM, 50ns, PDSO20, 0.300 INCH, SOJ-26/20
MCM64400BN60	MOTOROLA	获取价格	1MX4 FAST PAGE DRAM, 60ns, PDSO20, 0.300 INCH, SOJ-26/20
MCM64400BN60R2	MOTOROLA	获取价格	1MX4 FAST PAGE DRAM, 60ns, PDSO20, 0.300 INCH, SOJ-26/20
MCM64400BN70	MOTOROLA	获取价格	Fast Page DRAM, 1MX4, 70ns, CMOS, PDSO20, 0.300 INCH, SOJ-26/20

与MCM64100-60相关文章

解析光耦仿真器：升级光耦合器技术的必要性
2024-11-18

38
英伟达新一代Blackwell GPU过热问题致交付延迟
2024-11-18

30
国产厂商思特威CMOS图像传感器芯片单月出货超1亿颗，技术创新引领行业发展
2024-11-14

58
台积电5nm和3nm产能利用率达100%，半导体行业景气度持续攀升
2024-11-14

54

产品中心

服务支持

精选活动

关于我们

帮助中心

MCM64100-60

MCM64100-60 技术参数

MCM64100-60 数据手册

与MCM64100-60相关器件

与MCM64100-60相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

MCM64100-60

MCM64100-60 技术参数

MCM64100-60 数据手册

与MCM64100-60相关器件

与MCM64100-60相关文章

您还可以找

您在本页遇到什么问题？