Datasheet > MCM63F819KZP9R

MCM63F819KZP9R

更新时间： 2024-11-11 20:28:19

品牌	Logo	应用领域
恩智浦 - NXP		静态存储器内存集成电路
页数	文件大小	规格书
20页	397K
描述
256KX18 CACHE SRAM, 9ns, PBGA119, PLASTIC, BGA-119

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MCM63F819KZP9R 技术参数

生命周期：	Transferred	零件包装代码：	BGA
包装说明：	BGA,	针数：	119
Reach Compliance Code：	unknown	ECCN代码：	3A991.B.2.A
HTS代码：	8542.32.00.41	风险等级：	5.62
Is Samacsys：	N	最长访问时间：	9 ns
其他特性：	FLOW-THROUGH ARCHITECTURE	JESD-30 代码：	R-PBGA-B119
长度：	22 mm	内存密度：	4718592 bit
内存集成电路类型：	CACHE SRAM	内存宽度：	18
功能数量：	1	端子数量：	119
字数：	262144 words	字数代码：	256000
工作模式：	SYNCHRONOUS	最高工作温度：	70 °C
最低工作温度：		组织：	256KX18
封装主体材料：	PLASTIC/EPOXY	封装代码：	BGA
封装形状：	RECTANGULAR	封装形式：	GRID ARRAY
并行/串行：	PARALLEL	认证状态：	Not Qualified
座面最大高度：	2.4 mm	最大供电电压 (Vsup)：	3.6 V
最小供电电压 (Vsup)：	3.135 V	标称供电电压 (Vsup)：	3.3 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子形式：	BALL
端子节距：	1.27 mm	端子位置：	BOTTOM
宽度：	14 mm	Base Number Matches：	1

MCM63F819KZP9R 数据手册

Freescale Semiconductor, Inc.

SEMICONDUCTOR TECHNICAL DATA

Order this document

by MCM63F737K/D

MCM63F737K

MCM63F819K

Advance Information

128K x 36 and 256K x 18 Bit

Flow–Through BurstRAM

Synchronous Fast Static RAM

The MCM63F737K and MCM63F819K are 4M–bit synchronous fast static

RAMs designedtoprovideaburstable, highperformance, secondarycache. The

MCM63F737K (organized as 128K words by 36 bits) and the MCM63F819K

(organized as 256K words by 18 bits) integrate input registers, a 2–bit address

counter, and high speed SRAM onto a single monolithic circuit for reduced parts

count in cache data RAM applications. Synchronous design allows precise cycle

control with the use of an external clock (K).

TQ PACKAGE

TQFP

CASE 983A–01

Addresses (SA), data inputs (DQx), and all control signals except output

enable(G), sleepmode(ZZ), andlinearburstorder(LBO)areclock(K)controlled

through positive–edge–triggered noninverting registers.

ZP PACKAGE

PBGA

Bursts can be initiated with either ADSP or ADSC input pins. Subsequent burst

addresses can be generated internally by the MCM63F737K and MCM63F819K

(burstsequenceoperatesinlinearorinterleavedmodedependentuponthestate

of LBO) and controlled by the burst address advance (ADV) input pin.

Write cycles are internally self–timed and are initiated by the rising edge of the

clock (K) input. This feature eliminates complex off–chip write pulse generation

and provides increased timing flexibility for incoming signals.

CASE 999–02

Synchronous byte write (SBx), synchronous global write (SGW), and

synchronous write enable (SW) are provided to allow writes to either individual

bytes or to all bytes. The bytes are designated as “a”, “b”, etc. SBa controls DQa,

SBb controls DQb, etc. Individual bytes are written if the selected byte writes SBx

are asserted with SW. All bytes are written if either SGW is asserted or if all SBx

and SW are asserted.

For read cycles, a flow–through SRAM allows output data to simply flow freely

from the memory array.

TheMCM63F737KandMCM63F819Koperatefroma3.3Vcorepowersupply

and all outputs operate on a 2.5 V or 3.3 V power supply. All inputs and outputs

are JEDEC standard JESD8–5 compatible.

•

MCM63F737K/MCM63F819K–8.5 = 8.5 ns Access

MCM63F737K/MCM63F819K–9 ns = 9 ns Access

MCM63F737K/MCM63F819K–11 ns = 11 ns Access

3.3 V +10%, –5% Core Power Supply, 2.5 V or 3.3 V I/O Supply

ADSP, ADSC, and ADV Burst Control Pins

Selectable Burst Sequencing Order (Linear/Interleaved)

Single–Cycle Deselect Timing

Internally Self–Timed Write Cycle

Byte Write and Global Write Control

Sleep Mode (ZZ)

JEDEC Standard 100–Pin TQFP and 119–Pin PBGA Packages

•

This document contains information on a new product. Specifications and information herein are subject to change without notice.

10/1/99

Motorola, Inc. 1999

MOTOROLA FAST SRAM

MCM63F737K•MCM63F819K

For More Information On This Product,

Go to: www.freescale.com

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与MCM63F819KZP9R相关器件

型号	品牌	获取价格	描述	数据表
MCM63F819TQ10R	MOTOROLA	获取价格	256KX18 CACHE SRAM, 10ns, PQFP100, TQFP-100
MCM63F819TQ8.5	MOTOROLA	获取价格	Cache SRAM, 256KX18, 8.5ns, CMOS, PQFP100, TQFP-100
MCM63F819TQ8.5R	MOTOROLA	获取价格	Cache SRAM, 256KX18, 8.5ns, CMOS, PQFP100, TQFP-100
MCM63F819TQ9	MOTOROLA	获取价格	256KX18 CACHE SRAM, 9ns, PQFP100, TQFP-100
MCM63F819TQ9R	MOTOROLA	获取价格	Cache SRAM, 256KX18, 9ns, CMOS, PQFP100, TQFP-100
MCM63F819ZP10	NXP	获取价格	256KX18 CACHE SRAM, 10ns, PBGA119, 7 X 17 MM, PLASTIC, BGA-119
MCM63F819ZP8.5	MOTOROLA	获取价格	Cache SRAM, 256KX18, 8.5ns, CMOS, PBGA119, PLASTIC, BGA-119
MCM63F819ZP8.5R	MOTOROLA	获取价格	Cache SRAM, 256KX18, 8.5ns, CMOS, PBGA119, PLASTIC, BGA-119
MCM63F819ZP9	MOTOROLA	获取价格	Cache SRAM, 256KX18, 9ns, CMOS, PBGA119, PLASTIC, BGA-119
MCM63F819ZP9R	MOTOROLA	获取价格	256KX18 CACHE SRAM, 9ns, PBGA119, PLASTIC, BGA-119

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