MC74VHC244
Octal Bus Buffer
The MC74VHC244 is an advanced high speed CMOS octal bus
buffer fabricated with silicon gate CMOS technology.
The MC74VHC244 is a noninverting 3−state buffer, and has two
active−low output enables. This device is designed to be used with
3−state memory address drivers, etc.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7 V, allowing the interface of 5 V systems
to 3 V systems.
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MARKING DIAGRAMS
20
SOIC−20
DW SUFFIX
CASE 751D
• High Speed: t = 3.9 ns (Typ) at V = 5 V
PD
CC
VHC244
AWLYYWWG
20
• Low Power Dissipation: I = 4 mA (Max) at T = 25°C
CC
A
1
• High Noise Immunity: V
= V = 28% V
NIL CC
NIH
1
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
20
VHC
244
• Designed for 2 V to 5.5 V Operating Range
TSSOP−20
DT SUFFIX
CASE 948E
20
• Low Noise: V
= 0.9 V (Max)
OLP
ALYWG
1
G
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300 mA
• ESD Performance: Human Body Model > 2000 V
Machine Model > 200 V
1
20
SOEIAJ−20
M SUFFIX
CASE 967
VHC244
AWLYWWG
20
• Chip Complexity: 136 FETs
• These Devices are Pb−Free and are RoHS Compliant
1
1
VHC244 = Specific Device Code
A
WL, L
Y
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
2
4
6
8
18
16
14
12
A1
A2
A3
A4
YA1
YA2
YA3
YA4
WW, W
G or G
(Note: Microdot may be in either location)
PIN ASSIGNMENT
DATA
NONINVERTING
OUTPUTS
INPUTS
OEA
A1
1
2
3
4
5
6
7
8
9
20
V
CC
11
13
15
17
9
7
5
3
B1
B2
B3
B4
YB1
YB2
YB3
YB4
19 OEB
18 YA1
17 B4
16 YA2
15 B3
14 YA3
13 B2
12 YA4
11 B1
YB4
A2
YB3
A3
YB2
A4
1
OEA
OEB
OUTPUT
YB1
19
ENABLES
GND 10
Figure 1. Logic Diagram
ORDERING INFORMATION
See detailed ordering and shipping information in the
Ordering Information Table on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
1
Publication Order Number:
May, 2011 − Rev. 8
MC74VHC244/D