Datasheet > MC74VHC1GT50_07

MC74VHC1GT50_07

更新时间： 2024-10-29 05:30:07

品牌	Logo	应用领域
安森美 - ONSEMI		转换器电平转换器
页数	文件大小	规格书
6页	78K
描述
Noninverting Buffer / CMOS Logic Level Shifter TTL−Compatible Inputs

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MC74VHC1GT50_07 数据手册

MC74VHC1GT50

Noninverting Buffer /

CMOS Logic Level Shifter

TTL−Compatible Inputs

The MC74VHC1GT50 is a single gate noninverting buffer

fabricated with silicon gate CMOS technology. It achieves high speed

operation similar to equivalent Bipolar Schottky TTL while

maintaining CMOS low power dissipation.

http://onsemi.com

MARKING

DIAGRAMS

The internal circuit is composed of three stages, including a buffer

output which provides high noise immunity and stable output.

The device input is compatible with TTL−type input thresholds and

the output has a full 5 V CMOS level output swing. The input protection

circuitry on this device allows overvoltage tolerance on the input,

allowing the device to be used as a logic−level translator from 3 V

CMOS logic to 5 V CMOS Logic or from 1.8 V CMOS logic to 3 V

CMOS Logic while operating at the high−voltage power supply.

The MC74VHC1GT50 input structure provides protection when

voltages up to 7 V are applied, regardless of the supply voltage. This

allows the MC74VHC1GT50 to be used to interface high voltage to

low voltage circuits. The output structures also provide protection

VL M G

SC−88A/SOT−353/SC−70

DF SUFFIX

CASE 419A

VL M G

TSOP−5/SOT−23/SC−59

DT SUFFIX

when V = 0 V. These input and output structures help prevent

device destruction caused by supply voltage − input/output voltage

mismatch, battery backup, hot insertion, etc.

CASE 483

Features

VL = Device Code

= Date Code*

= Pb−Free Package

• Designed for 1.65 V to 5.5 V Operation

• High Speed: t = 3.5 ns (Typ) at V = 5 V

(Note: Microdot may be in either location)

• Low Power Dissipation: I = 1 mA (Max) at T = 25°C

*Date Code orientation and/or position may vary

depending upon manufacturing location.

• TTL−Compatible Inputs: V = 0.8 V; V = 2.0 V, V = 5 V

• CMOS−Compatible Outputs: V > 0.8 V ; V < 0.1 V @Load

• Power Down Protection Provided on Inputs and Outputs

• Balanced Propagation Delays

• Pin and Function Compatible with Other Standard Logic Families

• Chip Complexity: FETs = 104; Equivalent Gates = 26

• Pb−Free Packages are Available

PIN ASSIGNMENT

IN A

GND

OUT Y

FUNCTION TABLE

IN A

A Input

Y Output

GND

OUT Y

Figure 1. Pinout (Top View)

ORDERING INFORMATION

IN A

OUT Y

See detailed ordering and shipping information in the package

dimensions section on page 4 of this data sheet.

Figure 2. Logic Symbol

Publication Order Number:

February, 2007 − Rev. 13

MC74VHC1GT50/D

12 3 4 5 6

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与MC74VHC1GT50_07相关器件

型号	品牌	获取价格	描述	数据表
MC74VHC1GT50_11	ONSEMI	获取价格	Noninverting Buffer / CMOS Logic Level Shifter
MC74VHC1GT50_18	ONSEMI	获取价格	Buffer
MC74VHC1GT50DBVT1G	ONSEMI	获取价格	Buffer
MC74VHC1GT50DF	ONSEMI	获取价格	Noninverting Buffer / CMOS Logic Level Shifter
MC74VHC1GT50DF1G	ONSEMI	获取价格	IC,LOGIC GATE,BUFFER,AHC/VHC-CMOS,TSSOP,6PIN,PLASTIC
MC74VHC1GT50DF1G	ROCHESTER	获取价格	IC,LOGIC GATE,BUFFER,AHC/VHC-CMOS,TSSOP,6PIN,PLASTIC
MC74VHC1GT50DF2G	ROCHESTER	获取价格	IC,LOGIC GATE,BUFFER,AHC/VHC-CMOS,TSSOP,6PIN,PLASTIC
MC74VHC1GT50DFR2	ONSEMI	获取价格	AHC/VHC SERIES, 1-INPUT NON-INVERT GATE, PDSO5, SC-70, SC-88A, SOT-353, 5 PIN
MC74VHC1GT50DFR2	MOTOROLA	获取价格	AHC/VHC SERIES, 1-INPUT NON-INVERT GATE, PDSO5, SC-70, SC-88A, SOT-353, 5 PIN
MC74VHC1GT50DFT1	ONSEMI	获取价格	Noninverting Buffer / CMOS Logic Level Shifter

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