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MC74VHC1GT50DFT1 PDF预览

MC74VHC1GT50DFT1

更新时间: 2024-01-31 14:29:51
品牌 Logo 应用领域
安森美 - ONSEMI 转换器电平转换器栅极触发器逻辑集成电路光电二极管
页数 文件大小 规格书
8页 88K
描述
Noninverting Buffer / CMOS Logic Level Shifter

MC74VHC1GT50DFT1 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:SOT-353
包装说明:TSSOP,针数:5
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.28Is Samacsys:N
系列:AHC/VHCJESD-30 代码:R-PDSO-G5
JESD-609代码:e3长度:2 mm
逻辑集成电路类型:BUFFER功能数量:1
输入次数:1端子数量:5
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):265传播延迟(tpd):25.5 ns
认证状态:Not Qualified座面最大高度:1.1 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:MATTE TIN端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:1.25 mm
Base Number Matches:1

MC74VHC1GT50DFT1 数据手册

 浏览型号MC74VHC1GT50DFT1的Datasheet PDF文件第2页浏览型号MC74VHC1GT50DFT1的Datasheet PDF文件第3页浏览型号MC74VHC1GT50DFT1的Datasheet PDF文件第4页浏览型号MC74VHC1GT50DFT1的Datasheet PDF文件第5页浏览型号MC74VHC1GT50DFT1的Datasheet PDF文件第6页浏览型号MC74VHC1GT50DFT1的Datasheet PDF文件第7页 
MC74VHC1GT50  
Noninverting Buffer /  
CMOS Logic Level Shifter  
with TTL-Compatible Inputs  
The MC74VHC1GT50 is a single gate noninverting buffer fabricated  
with silicon gate CMOS technology. It achieves high speed operation  
similar to equivalent Bipolar Schottky TTL while maintaining CMOS  
low power dissipation.  
http://onsemi.com  
MARKING  
The internal circuit is composed of three stages, including a buffer  
output which provides high noise immunity and stable output.  
The device input is compatible with TTL- type input thresholds and the  
output has a full 5 V CMOS level output swing. The input protection  
circuitry on this device allows overvoltage tolerance on the input,  
allowing the device to be used as a logic- level translator from 3.0 V  
CMOS logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V  
CMOS Logic while operating at the high- voltage power supply.  
The MC74VHC1GT50 input structure provides protection when  
voltages up to 7 V are applied, regardless of the supply voltage. This  
allows the MC74VHC1GT50 to be used to interface high voltage to low  
voltage circuits. The output structures also provide protection when  
DIAGRAMS  
SC-88A / SOT-353/SC-70  
DF SUFFIX  
VLd  
CASE 419A  
Pin 1  
d = Date Code  
TSOP-5/SOT-23/SC-59  
DT SUFFIX  
VLd  
CASE 483  
V
CC  
= 0 V. These input and output structures help prevent device  
destruction caused by supply voltage - input/output voltage mismatch,  
battery backup, hot insertion, etc.  
Pin 1  
d = Date Code  
Designed for 1.65 V to 5.5 V Operation  
CC  
High Speed: t = 3.5 ns (Typ) at V = 5 V  
PD  
CC  
Low Power Dissipation: I = 1 mA (Max) at T = 25°C  
CC  
A
PIN ASSIGNMENT  
TTL-Compatible Inputs: V = 0.8 V; V = 2.0 V, V = 5 V  
IL  
IH  
CC  
1
2
3
4
5
NC  
IN A  
CMOS- Compatible Outputs: V > 0.8 V ; V < 0.1 V @Load  
OH  
CC  
OL  
CC  
Power Down Protection Provided on Inputs and Outputs  
Balanced Propagation Delays  
Pin and Function Compatible with Other Standard Logic Families  
Chip Complexity: FETs = 104; Equivalent Gates = 26  
GND  
OUT Y  
V
CC  
FUNCTION TABLE  
A Input  
Y Output  
L
L
NC  
5
V
CC  
1
2
3
H
H
IN A  
GND  
4
OUT Y  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
Figure 1. Pinout (Top View)  
1
IN A  
OUT Y  
Figure 2. Logic Symbol  
Semiconductor Components Industries, LLC, 2003  
1
Publication Order Number:  
March, 2003 - Rev. 11  
MC74VHC1GT50/D  

MC74VHC1GT50DFT1 替代型号

型号 品牌 替代类型 描述 数据表
MC74VHC1GT50DFT2 ONSEMI

完全替代

Noninverting Buffer / CMOS Logic Level Shifter
M74VHC1GT50DFT2G ONSEMI

类似代替

Noninverting Buffer / CMOS Logic Level Shifter TTL−Compatible Inputs
M74VHC1GT50DFT1G ONSEMI

类似代替

Noninverting Buffer / CMOS Logic Level Shifter TTL−Compatible Inputs

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IC,LOGIC GATE,BUFFER,AHC/VHC-CMOS,TSSOP,6PIN,PLASTIC