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MC74VHC1GT00DFT4 PDF预览

MC74VHC1GT00DFT4

更新时间: 2024-11-01 20:23:03
品牌 Logo 应用领域
安森美 - ONSEMI 输入元件光电二极管逻辑集成电路触发器
页数 文件大小 规格书
12页 118K
描述
AHC/VHC SERIES, 2-INPUT NAND GATE, PDSO5, SC-70, SC-88A, SOT-353, 5 PIN

MC74VHC1GT00DFT4 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOT-353包装说明:SC-70, SC-88A, SOT-353, 5 PIN
针数:5Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.48
系列:AHC/VHCJESD-30 代码:R-PDSO-G5
JESD-609代码:e0长度:2 mm
逻辑集成电路类型:NAND GATE最大I(ol):0.008 A
功能数量:1输入次数:2
端子数量:5最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP5/6,.08
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):240
电源:3.3/5 VProp。Delay @ Nom-Sup:10.5 ns
传播延迟(tpd):17.5 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1.1 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:1.25 mmBase Number Matches:1

MC74VHC1GT00DFT4 数据手册

 浏览型号MC74VHC1GT00DFT4的Datasheet PDF文件第2页浏览型号MC74VHC1GT00DFT4的Datasheet PDF文件第3页浏览型号MC74VHC1GT00DFT4的Datasheet PDF文件第4页浏览型号MC74VHC1GT00DFT4的Datasheet PDF文件第5页浏览型号MC74VHC1GT00DFT4的Datasheet PDF文件第6页浏览型号MC74VHC1GT00DFT4的Datasheet PDF文件第7页 
MC74VHC1GT00  
2-Input NAND Gate /  
CMOS Logic Level Shifter  
with LSTTL–Compatible Inputs  
The MC74VHC1GT00 is a single gate 2–input NAND fabricated  
with silicon gate CMOS technology. It achieves high speed operation  
similar to equivalent Bipolar Schottky TTL while maintaining CMOS  
low power dissipation.  
http://onsemi.com  
The internal circuit is composed of three stages, including a buffer  
output which provides high noise immunity and stable output.  
The device input is compatible with TTL–type input thresholds and  
the output has a full 5V CMOS level output swing. The input  
protection circuitry on this device allows overvoltage tolerance on the  
input, allowing the device to be used as a logic–level translator from  
3.0V CMOS logic to 5.0V CMOS Logic or from 1.8V CMOS logic to  
3.0V CMOS Logic while operating at the high–voltage power supply.  
The MC74VHC1GT00 input structure provides protection when  
voltages up to 7V are applied, regardless of the supply voltage. This  
allows the MC74VHC1GT00 to be used to interface 5V circuits to 3V  
MARKING  
DIAGRAMS  
SC–88A / SOT–353/SC–70  
DF SUFFIX  
d
VH  
CASE 419A  
Pin 1  
d = Date Code  
TSOP–5/SOT–23/SC–59  
DT SUFFIX  
circuits. The output structures also provide protection when V = 0V.  
d
CC  
VH  
These input and output structures help prevent device destruction  
caused by supply voltage – input/output voltage mismatch, battery  
backup, hot insertion, etc.  
CASE 483  
Pin 1  
d = Date Code  
High Speed: t = 3.1ns (Typ) at V = 5V  
PD  
CC  
Low Power Dissipation: I = 2µA (Max) at T = 25°C  
CC  
A
PIN ASSIGNMENT  
TTL–Compatible Inputs: V = 0.8V; V = 2.0V  
IL  
IH  
1
2
3
4
5
IN B  
IN A  
GND  
CMOS–Compatible Outputs: V > 0.8V ; V < 0.1V @Load  
OH  
CC  
OL  
CC  
Power Down Protection Provided on Inputs and Outputs  
Balanced Propagation Delays  
Pin and Function Compatible with Other Standard Logic Families  
Latchup Performance Exceeds 300mA  
OUT Y  
VCC  
ESD Performance: HBM > 2000V  
ORDERING INFORMATION  
IN B  
IN A  
GND  
1
2
3
5
4
VCC  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
OUT Y  
FUNCTION TABLE  
Figure 1. 5–Lead SOT–353 Pinout (Top View)  
Inputs  
Output  
Y
A
B
L
L
L
H
L
H
H
H
L
IN A  
IN B  
&
OUT Y  
H
H
H
Figure 2. Logic Symbol  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
August, 2000 – Rev. 5  
MC74VHC1GT00/D  

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