是否Rohs认证: | 不符合 | 生命周期: | Obsolete |
零件包装代码: | TSOP | 包装说明: | TSSOP, TSOP5/6,.11,37 |
针数: | 5 | Reach Compliance Code: | not_compliant |
HTS代码: | 8542.39.00.01 | 风险等级: | 5.39 |
系列: | AHC/VHC | JESD-30 代码: | R-PDSO-G5 |
JESD-609代码: | e0 | 长度: | 3 mm |
逻辑集成电路类型: | NAND GATE | 最大I(ol): | 0.008 A |
湿度敏感等级: | 1 | 功能数量: | 1 |
输入次数: | 2 | 端子数量: | 5 |
最高工作温度: | 125 °C | 最低工作温度: | -55 °C |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | TSSOP |
封装等效代码: | TSOP5/6,.11,37 | 封装形状: | RECTANGULAR |
封装形式: | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH | 包装方法: | TAPE AND REEL |
峰值回流温度(摄氏度): | 240 | 电源: | 3.3/5 V |
Prop。Delay @ Nom-Sup: | 10.5 ns | 传播延迟(tpd): | 17.5 ns |
认证状态: | Not Qualified | 施密特触发器: | NO |
座面最大高度: | 1.1 mm | 子类别: | Gates |
最大供电电压 (Vsup): | 5.5 V | 最小供电电压 (Vsup): | 3 V |
标称供电电压 (Vsup): | 3.3 V | 表面贴装: | YES |
技术: | CMOS | 温度等级: | MILITARY |
端子面层: | Tin/Lead (Sn/Pb) | 端子形式: | GULL WING |
端子节距: | 0.95 mm | 端子位置: | DUAL |
处于峰值回流温度下的最长时间: | 30 | 宽度: | 1.5 mm |
Base Number Matches: | 1 |
型号 | 品牌 | 替代类型 | 描述 | 数据表 |
SN74AHCT1G00DCKT | TI |
功能相似 |
SINGLE 2-INPUT POSITIVE-NAND GATE | |
SN74AHCT1G00DCKR | TI |
功能相似 |
SINGLE 2-INPUT POSITIVE-NAND GATE | |
M74VHC1GT00DTT1G | ONSEMI |
功能相似 |
Single 2−Input NAND Gate/CMOS Logic Level Shifter LSTTL−Compatible Inputs |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
MC74VHC1GT00DTT1G | ONSEMI |
获取价格 |
Single 2-Input NAND Gate CMOS Logic Level Shifter | |
MC74VHC1GT00DTT2 | ONSEMI |
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AHC/VHC SERIES, 2-INPUT NAND GATE, PDSO5, SC-59, SOT-23, TSOP-5 | |
MC74VHC1GT00DTT3 | ETL |
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2-Input NAND Gate / CMOS Logic Level Shifter with LSTTL-Compatible Inputs | |
MC74VHC1GT00DTT3 | LRC |
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2-Input NAND Gate/CMOS Logic Level Shifter | |
MC74VHC1GT00DTT3 | ONSEMI |
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AHC/VHC SERIES, 2-INPUT NAND GATE, PDSO5, SC-59, SOT-23, TSOP-5 | |
MC74VHC1GT00MU1TCG | ONSEMI |
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Single 2-Input NAND Gate | |
MC74VHC1GT00MU3TCG | ONSEMI |
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Single 2-Input NAND Gate | |
MC74VHC1GT00P5T5G | ONSEMI |
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Single 2-Input NAND Gate | |
MC74VHC1GT00P5T5G-L22088 | ONSEMI |
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Single 2-Input NAND Gate TTL level | |
MC74VHC1GT00XV5T2G | ONSEMI |
获取价格 |
Single 2-Input NAND Gate |