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MC74VHC1G50DFT2G PDF预览

MC74VHC1G50DFT2G

更新时间: 2024-11-04 12:48:51
品牌 Logo 应用领域
安森美 - ONSEMI 栅极触发器逻辑集成电路光电二极管PC
页数 文件大小 规格书
8页 250K
描述
The MC74VHC1G50 is an advanced high speed CMOS buffer

MC74VHC1G50DFT2G 技术参数

是否无铅: 不含铅生命周期:Active
零件包装代码:SOT-353包装说明:TSSOP, TSSOP5/6,.08
针数:5Reach Compliance Code:compliant
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:1.2Samacsys Confidence:3
Samacsys Status:ReleasedSamacsys PartID:11449702
Samacsys Pin Count:5Samacsys Part Category:Integrated Circuit
Samacsys Package Category:SOT23 (5-Pin)Samacsys Footprint Name:SC?88A (SC?70?5/SOT?353
Samacsys Released Date:2020-02-25 10:17:06Is Samacsys:N
系列:AHC/VHCJESD-30 代码:R-PDSO-G5
JESD-609代码:e3长度:2 mm
负载电容(CL):50 pF逻辑集成电路类型:BUFFER
最大I(ol):0.008 A湿度敏感等级:1
功能数量:1输入次数:1
端子数量:5最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP5/6,.08
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TR峰值回流温度(摄氏度):260
电源:2/5.5 V最大电源电流(ICC):0.04 mA
Prop。Delay @ Nom-Sup:10 ns传播延迟(tpd):14.5 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:1.1 mm子类别:Gates
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Tin (Sn)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:1.25 mm
Base Number Matches:1

MC74VHC1G50DFT2G 数据手册

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MC74VHC1G50  
Buffer  
The MC74VHC1G50 is an advanced high speed CMOS buffer  
fabricated with silicon gate CMOS technology. It achieves high speed  
operation similar to equivalent Bipolar Schottky TTL while maintaining  
CMOS low power dissipation.  
The internal circuit is composed of three stages, including a buffered  
output which provides high noise immunity and stable output.  
The MC74VHC1G50 input structure provides protection when  
voltages up to 7.0 V are applied, regardless of the supply voltage. This  
allows the MC74VHC1G50 to be used to interface 5.0 V circuits to 3.0 V  
circuits.  
http://onsemi.com  
MARKING  
DIAGRAMS  
SC--88A / SOT--353/SC--70  
DF SUFFIX  
VRd  
High Speed: tPD = 3.5 ns (Typ) at VCC = 5 V  
Low Power Dissipation: ICC = 1 mA (Max) at TA = 25°C  
Power Down Protection Provided on Inputs  
CASE 419A  
Pin 1  
d = Date Code  
Balanced Propagation Delays  
Pin and Function Compatible with Other Standard Logic Families  
Chip Complexity: FET = 104; Equivalent Gate = 26  
These devices are available in Pb--free package(s). Specifications herein  
apply to both standard and Pb--free devices. Please see our website at  
www.onsemi.com for specific Pb--free orderable part numbers, or  
contact your local ON Semiconductor sales office or representative.  
TSOP--5/SOT--23/SC--59  
DT SUFFIX  
VRd  
CASE 483  
Pin 1  
d = Date Code  
1
2
3
5
4
V
CC  
NC  
IN A  
GND  
PIN ASSIGNMENT  
1
2
3
4
5
NC  
IN A  
GND  
OUT Y  
OUT Y  
V
CC  
FUNCTION TABLE  
Figure 1. Pinout (Top View)  
A Input  
Y Output  
L
L
H
H
1
IN A  
OUT Y  
ORDERING INFORMATION  
Seedetailedorderingandshippinginformationinthepackage  
dimensions section on page 4 of this data sheet.  
Figure 2. Logic Symbol  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
March, 2006 -- Rev. 12  
MC74VHC1G50/D  

MC74VHC1G50DFT2G 替代型号

型号 品牌 替代类型 描述 数据表
MC74VHC1G50DFT1G ONSEMI

完全替代

Buffer
MC74VHC1G50DFT1 ONSEMI

类似代替

Buffer

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