MC74VHC1G50
Buffer
The MC74VHC1G50 is an advanced high speed CMOS buffer
fabricated with silicon gate CMOS technology. It achieves high speed
operation similar to equivalent Bipolar Schottky TTL while maintaining
CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffered
output which provides high noise immunity and stable output.
The MC74VHC1G50 input structure provides protection when
voltages up to 7.0 V are applied, regardless of the supply voltage. This
allows the MC74VHC1G50 to be used to interface 5.0 V circuits to 3.0 V
circuits.
http://onsemi.com
MARKING
DIAGRAMS
SC--88A / SOT--353/SC--70
DF SUFFIX
VRd
• High Speed: tPD = 3.5 ns (Typ) at VCC = 5 V
• Low Power Dissipation: ICC = 1 mA (Max) at TA = 25°C
• Power Down Protection Provided on Inputs
CASE 419A
Pin 1
d = Date Code
• Balanced Propagation Delays
• Pin and Function Compatible with Other Standard Logic Families
• Chip Complexity: FET = 104; Equivalent Gate = 26
• These devices are available in Pb--free package(s). Specifications herein
apply to both standard and Pb--free devices. Please see our website at
www.onsemi.com for specific Pb--free orderable part numbers, or
contact your local ON Semiconductor sales office or representative.
TSOP--5/SOT--23/SC--59
DT SUFFIX
VRd
CASE 483
Pin 1
d = Date Code
1
2
3
5
4
V
CC
NC
IN A
GND
PIN ASSIGNMENT
1
2
3
4
5
NC
IN A
GND
OUT Y
OUT Y
V
CC
FUNCTION TABLE
Figure 1. Pinout (Top View)
A Input
Y Output
L
L
H
H
1
IN A
OUT Y
ORDERING INFORMATION
Seedetailedorderingandshippinginformationinthepackage
dimensions section on page 4 of this data sheet.
Figure 2. Logic Symbol
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
March, 2006 -- Rev. 12
MC74VHC1G50/D