Datasheet > MC74HCT74A

MC74HCT74A

更新时间： 2024-11-23 05:09:55

品牌	Logo	应用领域
安森美 - ONSEMI		触发器
页数	文件大小	规格书
8页	158K
描述
Dual D Flip-Flop with Set and Reset with LSTTL Compatible Inputs

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中文翻译

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MC74HCT74A 数据手册

High–Performance Silicon–Gate CMOS

http://onsemi.com

The MC74HCT74A is identical in pinout to the LS74. This device

may be used as a level converter for interfacing TTL or NMOS outputs

to High Speed CMOS inputs.

This device consists of two D flip–flops with individual Set, Reset,

and Clock inputs. Information at a D–input is transferred to the

corresponding Q output on the next positive going edge of the clock

input. Both Q and Q outputs are available from each flip–flop. The Set

and Reset inputs are asynchronous.

MARKING

DIAGRAMS

PDIP–14

N SUFFIX

CASE 646

MC74HCT74AN

AWLYYWW

• Output Drive Capability: 10 LSTTL Loads

• TTL NMOS Compatible Input Levels

• Outputs Directly Interface to CMOS, NMOS, and TTL

• Operating Voltage Range: 4.5 to 5.5 V

• Low Input Current: 1.0 µA

SOIC–14

D SUFFIX

CASE 751A

HCT74A

AWLYWW

= Assembly Location

WL or L = Wafer Lot

YY or Y = Year

• In Compliance with the Requirements Defined by JEDEC Standard

No. 7A

WW or W = Work Week

PIN ASSIGNMENT

• Chip Complexity: 136 FETs or 34 Equivalent Gates

RESET 1

DATA 1

13 RESET 2

LOGIC DIAGRAM

CLOCK 1

SET 1

DATA 2

RESET 1

11 CLOCK 2

10 SET 2

DATA 1

CLOCK 1

GND

SET 1

FUNCTION TABLE

PIN 14 = V

PIN 7 = GND

Inputs

Outputs

RESET 2

Set Reset Clock Data

DATA 2

CLOCK 2

SET 2

No Change

Design Criteria

Internal Gate Count*

Value

Units

ea.

*Both outputs will remain high as long as Set and

Reset are low, but the output states are unpredict-

able if Set and Reset go high simultaneously.

Internal Gate Propagation Delay

Internal Gate Power Dissipation

1.5

5.0

µW

ORDERING INFORMATION

Speed Power Product

.0075

Device

Package

PDIP–14

SOIC–14

Shipping

2000 / Box

55 / Rail

*Equivalent to a two–input NAND gate.

MC74HCT74AN

MC74HCT74AD

MC74HCT74ADR2

2500 / Reel

Semiconductor Components Industries, LLC, 2000

Publication Order Number:

March, 2000 – Rev. 8

MC74HCT74A/D

12 3 4 5 6 7 8

中文翻译

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与MC74HCT74A相关器件

型号	品牌	获取价格	描述	数据表
MC74HCT74A_06	ONSEMI	获取价格	Dual D Flip−Flop with Set and Reset with LSTTL Compatible Inputs
MC74HCT74AD	MOTOROLA	获取价格	Quad 2-Input NAND Gate with LSTTL-Compatible Inputs
MC74HCT74AD	ONSEMI	获取价格	Dual D Flip-Flop with Set and Reset with LSTTL Compatible Inputs
MC74HCT74ADG	ONSEMI	获取价格	Dual D Flip−Flop with Set and Reset with LSTTL Compatible Inputs
MC74HCT74ADR2	ONSEMI	获取价格	Dual D Flip-Flop with Set and Reset with LSTTL Compatible Inputs
MC74HCT74ADR2	MOTOROLA	获取价格	D Flip-Flop, HCT Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, CMO
MC74HCT74ADR2G	ONSEMI	获取价格	Dual D Flip−Flop with Set and Reset with LSTTL Compatible Inputs
MC74HCT74AN	MOTOROLA	获取价格	Quad 2-Input NAND Gate with LSTTL-Compatible Inputs
MC74HCT74AN	ONSEMI	获取价格	Dual D Flip-Flop with Set and Reset with LSTTL Compatible Inputs
MC74HCT74AND	MOTOROLA	获取价格	D Flip-Flop, 2-Func, Positive Edge Triggered, CMOS, PDIP14

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