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MC74HC534DWS PDF预览

MC74HC534DWS

更新时间: 2024-09-15 13:11:19
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 触发器
页数 文件大小 规格书
7页 165K
描述
D Flip-Flop, 8-Func, Positive Edge Triggered, CMOS, PDSO20

MC74HC534DWS 技术参数

是否Rohs认证:不符合生命周期:Obsolete
包装说明:SOP, SOP20,.4Reach Compliance Code:unknown
风险等级:5.92Is Samacsys:N
JESD-30 代码:R-PDSO-G20JESD-609代码:e0
逻辑集成电路类型:D FLIP-FLOP功能数量:8
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE电源:2/6 V
认证状态:Not Qualified子类别:FF/Latches
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL触发器类型:POSITIVE EDGE
Base Number Matches:1

MC74HC534DWS 数据手册

 浏览型号MC74HC534DWS的Datasheet PDF文件第2页浏览型号MC74HC534DWS的Datasheet PDF文件第3页浏览型号MC74HC534DWS的Datasheet PDF文件第4页浏览型号MC74HC534DWS的Datasheet PDF文件第5页浏览型号MC74HC534DWS的Datasheet PDF文件第6页浏览型号MC74HC534DWS的Datasheet PDF文件第7页 
SEMICONDUCTOR TECHNICAL DATA  
High–Performance Silicon–Gate CMOS  
J SUFFIX  
CERAMIC PACKAGE  
CASE 732–03  
20  
20  
The MC54/74HC534A is identical in pinout to the LS534. The device  
inputs are compatible with standard CMOS outputs; with pullup resistors,  
they are compatible with LSTTL outputs.  
Data meeting the setup time is clocked, in inverted form, to the outputs  
with the rising edge of the Clock. The Output Enable input does not affect the  
states of the flip–flops, but when Output Enable is high, the outputs are  
forced to the high impedance state. Thus, data may be stored even when the  
outputs are not enabled.  
1
N SUFFIX  
PLASTIC PACKAGE  
CASE 738–03  
1
The HC534A is identical in function to the HC564 which has the data  
inputs on the opposite side of the package from the outputs to facilitate PC  
board layout.  
This device is similar in function to the HC374A, which has noninverting  
outputs.  
DW SUFFIX  
SOIC PACKAGE  
CASE 751D–04  
20  
1
ORDERING INFORMATION  
Output Drive Capability: 15 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS and TTL  
Operating Voltage Range: 2.0 to 6.0 V  
MC54HCXXXAJ  
MC74HCXXXAN  
Ceramic  
Plastic  
SOIC  
MC74HCXXXADW  
Low Input Current: 1.0 µA  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
PIN ASSIGNMENT  
Chip Complexity: 282 FETs or 68.5 Equivalent Gates  
OUTPUT  
ENABLE  
1
20  
V
CC  
Q0  
2
3
19  
18  
Q7  
D7  
D0  
LOGIC DIAGRAM  
D1  
4
17  
D6  
Q1  
Q2  
5
16  
15  
14  
13  
12  
11  
Q6  
2
3
Q0  
Q1  
Q2  
Q3  
Q4  
Q5  
Q6  
Q7  
6
Q5  
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
5
6
4
D2  
7
D5  
7
D3  
8
D4  
8
9
Q3  
9
Q4  
DATA  
INPUTS  
INVERTING  
OUTPUTS  
13  
14  
17  
18  
GND  
10  
CLOCK  
12  
15  
16  
19  
FUNCTION TABLE  
11  
Inputs  
Output  
CLOCK  
Output  
Enable Clock  
D
Q
L
L
L
H
L
X
X
L
1
PIN 20 = V  
CC  
PIN 10 = GND  
OUTPUT ENABLE  
H
No Change  
Z
L,H,  
X
H
X = Don’t Care  
Z = High Impedance  
3/97  
REV 7  
Motorola, Inc. 1997  

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