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MC74HC540ADWR2G PDF预览

MC74HC540ADWR2G

更新时间: 2024-11-01 05:09:55
品牌 Logo 应用领域
安森美 - ONSEMI 驱动器
页数 文件大小 规格书
8页 119K
描述
Octal 3−State Inverting Buffer/Line Driver/Line Receiver High−Performance Silicon−Gate CMOS

MC74HC540ADWR2G 技术参数

是否无铅: 不含铅生命周期:Active
零件包装代码:SOIC包装说明:SOP, SOP20,.4
针数:20Reach Compliance Code:compliant
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:0.41控制类型:ENABLE LOW
系列:HC/UHJESD-30 代码:R-PDSO-G20
JESD-609代码:e3长度:12.8 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.006 A湿度敏感等级:3
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:2/6 V
Prop。Delay @ Nom-Sup:28 ns传播延迟(tpd):120 ns
认证状态:Not Qualified座面最大高度:2.65 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:7.5 mmBase Number Matches:1

MC74HC540ADWR2G 数据手册

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MC74HC540A  
Octal 3−State Inverting  
Buffer/Line Driver/Line  
Receiver  
High−Performance Silicon−Gate CMOS  
http://onsemi.com  
MARKING  
The MC74HC540A is identical in pinout to the LS540. The device  
inputs are compatible with Standard CMOS outputs. External pull−up  
resistors make them compatible with LSTTL outputs.  
The HC540A is an octal inverting buffer/line driver/line receiver  
designed to be used with 3−state memory address drivers, clock  
drivers, and other bus−oriented systems. This device features inputs  
and outputs on opposite sides of the package and two ANDed  
active−low output enables.  
DIAGRAMS  
20  
20  
PDIP−20  
N SUFFIX  
CASE 738  
MC74HC540AN  
AWLYYWWG  
1
1
The HC540A is similar in function to the HC541A, which has  
noninverting outputs.  
20  
Features  
SOIC−20  
DW SUFFIX  
CASE 751D  
20  
74HC540A  
AWLYYWWG  
Output Drive Capability: 15 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2.0 to 6.0 V  
1
1
Low Input Current: 1 mA  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance With the JEDEC Standard No. 7A Requirements  
Chip Complexity: 124 FETs or 31 Equivalent Gates  
Pb−Free Packages are Available*  
20  
HC  
540A  
ALYWG  
G
TSSOP−20  
DT SUFFIX  
CASE 948E  
20  
1
1
20  
SOEIAJ−20  
F SUFFIX  
CASE 967  
20  
74HC540A  
AWLYWWG  
1
1
A
WL, L  
YY, Y  
= Assembly Location  
= Wafer Lot  
= Year  
WW, W = Work Week  
G
G
= Pb−Free Package  
= Pb−Free Package  
(Note: Microdot may be in either location)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 2 of this data sheet.  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
© Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
July, 2005 − Rev. 9  
MC74HC540A/D  

MC74HC540ADWR2G 替代型号

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MM74HC540WM ONSEMI

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MC74HC540ADWG ONSEMI

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Octal 3−State Inverting Buffer/Line Driver/Line Receiver High−Performance Sili
MC74HC540ADW ONSEMI

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Octal 3-State Inverting Buffer/Line Driver/Line Receiver

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