SEMICONDUCTOR TECHNICAL DATA
High–Performance Silicon–Gate CMOS
N SUFFIX
PLASTIC PACKAGE
CASE 646–06
The MC74HC03A is identical in pinout to the LS03. The device inputs
are compatible with Standard CMOS outputs; with pullup resistors, they
are compatible with LSTTL outputs.
14
1
The HC03A NAND gate has, as its outputs, a high–performance MOS
N–Channel transistor. This NAND gate can, therefore, with a suitable
pullup resistor, be used in wired–AND applications. Having the output
characteristic curves given in this data sheet, this device can be used as
an LED driver or in any other application that only requires a sinking
current.
D SUFFIX
SOIC PACKAGE
CASE 751A–03
14
1
DT SUFFIX
TSSOP PACKAGE
CASE 948G–01
14
•
•
•
•
•
•
•
Output Drive Capability: 10 LSTTL Loads With Suitable Pullup Resistor
Outputs Directly Interface to CMOS, NMOS and TTL
High Noise Immunity Characteristic of CMOS Devices
Operating Voltage Range: 2 to 6V
Low Input Current: 1µA
In Compliance With the JEDEC Standard No. 7A Requirements
Chip Complexity: 28 FETs or 7 Equivalent Gates
1
ORDERING INFORMATION
MC74HCXXAN
MC74HCXXAD
MC74HCXXADT
Plastic
SOIC
TSSOP
DESIGN GUIDE
FUNCTION TABLE
Criteria
Value
7.0
Unit
ea
Inputs
Output
Internal Gate Count*
A
B
Y
Internal Gate Propagation Delay
Internal Gate Power Dissipation
1.5
ns
5.0
µW
pJ
L
L
L
H
L
Z
Z
Z
L
Speed Power Product
0.0075
H
H
* Equivalent to a two–input NAND gate
H
Z = High Impedance
LOGIC DIAGRAM
V
CC
Pinout: 14–Lead Packages (Top View)
OUTPUT
PROTECTION
DIODE
V
B4
13
A4
12
Y4
11
B3
10
A3
9
Y3
8
CC
3,6,8,11
Y*
14
1,4,9,12
A
2,5,10,13
B
PIN 14 = V
CC
1
2
3
4
5
6
7
PIN 7 = GND
* Denotes open–drain outputs
A1
B1
Y1
A2
B2
Y2
GND
10/95
Motorola, Inc. 1995
REV 7
1