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MC74HC04ADTR2G PDF预览

MC74HC04ADTR2G

更新时间: 2024-11-17 05:09:59
品牌 Logo 应用领域
安森美 - ONSEMI 逻辑集成电路光电二极管
页数 文件大小 规格书
9页 137K
描述
Hex Inverter High−Performance Silicon−Gate CMOS

MC74HC04ADTR2G 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP, TSSOP14,.25针数:14
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:0.56系列:HC/UH
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:5 mm负载电容(CL):50 pF
逻辑集成电路类型:INVERTER最大I(ol):0.004 A
湿度敏感等级:1功能数量:6
输入次数:1端子数量:14
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:2/6 V
Prop。Delay @ Nom-Sup:22 ns传播延迟(tpd):110 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:1.2 mm子类别:Gates
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:4.4 mm
Base Number Matches:1

MC74HC04ADTR2G 数据手册

 浏览型号MC74HC04ADTR2G的Datasheet PDF文件第2页浏览型号MC74HC04ADTR2G的Datasheet PDF文件第3页浏览型号MC74HC04ADTR2G的Datasheet PDF文件第4页浏览型号MC74HC04ADTR2G的Datasheet PDF文件第5页浏览型号MC74HC04ADTR2G的Datasheet PDF文件第6页浏览型号MC74HC04ADTR2G的Datasheet PDF文件第7页 
MC74HC04A  
Hex Inverter  
HighPerformance SiliconGate CMOS  
The MC74HC04A is identical in pinout to the LS04 and the  
MC14069. The device inputs are compatible with Standard CMOS  
outputs; with pullup resistors, they are compatible with LSTTL  
outputs.  
http://onsemi.com  
MARKING  
The device consists of six threestage inverters.  
DIAGRAMS  
Features  
Output Drive Capability: 10 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS and TTL  
Operating Voltage Range: 2.0 to 6.0 V  
Low Input Current: 1 mA  
14  
PDIP14  
N SUFFIX  
CASE 646  
MC74HC04AN  
AWLYYWWG  
14  
1
1
High Noise Immunity Characteristic of CMOS Devices  
In Compliance With the JEDEC Standard No. 7A Requirements  
Chip Complexity: 36 FETs or 9 Equivalent Gates  
PbFree Packages are Available  
14  
SOIC14  
D SUFFIX  
CASE 751A  
HC04AG  
AWLYWW  
14  
1
1
LOGIC DIAGRAM  
1
3
5
2
4
6
A1  
A2  
A3  
Y1  
Y2  
Y3  
14  
TSSOP14  
DT SUFFIX  
CASE 948G  
HC  
04  
14  
ALYWG  
1
G
1
Y = A  
A
= Assembly Location  
WL or L = Wafer Lot  
YY or Y = Year  
WW or W = Work Week  
9
8
10  
12  
A4  
A5  
A6  
Y4  
Y5  
Y6  
G or G  
= PbFree Package  
11  
13  
(Note: Microdot may be in either location)  
FUNCTION TABLE  
Pinout: 14Lead Packages (Top View)  
V
A6  
Y6  
A5  
Y5  
A4  
Y4  
Inputs  
A
Outputs  
Y
CC  
14  
13  
12  
11  
10  
9
8
L
H
L
H
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 3 of this data sheet.  
1
2
3
4
5
6
7
A1  
Y1  
A2  
Y2  
A3  
Y3 GND  
© Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
October, 2006 Rev. 11  
MC74HC04A/D  

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