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MC56F8246MLFR PDF预览

MC56F8246MLFR

更新时间: 2024-09-16 15:40:59
品牌 Logo 应用领域
恩智浦 - NXP 时钟外围集成电路
页数 文件大小 规格书
88页 4339K
描述
MICROCONTROLLER

MC56F8246MLFR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred包装说明:7 X 7 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, PLASTIC, MS-026BBC, LQFP-48
Reach Compliance Code:compliantECCN代码:3A991.A.2
HTS代码:8542.31.00.01风险等级:5.78
具有ADC:YES地址总线宽度:
位大小:16最大时钟频率:16 MHz
DAC 通道:YESDMA 通道:NO
外部数据总线宽度:JESD-30 代码:S-PQFP-G48
JESD-609代码:e3长度:7 mm
湿度敏感等级:3I/O 线路数量:39
端子数量:48最高工作温度:125 °C
最低工作温度:-40 °CPWM 通道:YES
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度):260ROM可编程性:FLASH
座面最大高度:1.6 mm速度:60 MHz
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:MATTE TIN端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40宽度:7 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLERBase Number Matches:1

MC56F8246MLFR 数据手册

 浏览型号MC56F8246MLFR的Datasheet PDF文件第2页浏览型号MC56F8246MLFR的Datasheet PDF文件第3页浏览型号MC56F8246MLFR的Datasheet PDF文件第4页浏览型号MC56F8246MLFR的Datasheet PDF文件第5页浏览型号MC56F8246MLFR的Datasheet PDF文件第6页浏览型号MC56F8246MLFR的Datasheet PDF文件第7页 
Freescale Semiconductor  
Technical Data  
Document Number: MC56F825X  
Rev. 4, 06/2014  
MC56F825x/MC56F824x  
44-pin LQFP  
Case:  
48-pin LQFP  
Case:  
10 x 10 mm2  
7 x 7 mm2  
64-pin LQFP  
Case:  
MC56F825x/MC56F824x  
Digital Signal Controller  
10 x 10 mm2  
The MC56F825x/MC56F824x is a member of the 56800E  
core-based family of digital signal controllers (DSCs). It  
combines, on a single chip, the processing power of a DSP  
and the functionality of a microcontroller with a flexible set of  
peripherals to create a cost-effective solution. Because of its  
low cost, configuration flexibility, and compact program  
code, it is well-suited for many applications. The  
MC56F825x/MC56F824x includes many peripherals that are  
especially useful for cost-sensitive applications, including:  
• Industrial control  
On-chip features include:  
• 60 MHz operation frequency  
• DSP and MCU functionality in a unified, C-efficient  
architecture  
• On-chip memory  
– 56F8245/46: 48 KB (24K x 16) flash memory; 6 KB  
(3K x 16) unified data/program RAM  
– 56F8247: 48 KB (24K x 16) flash memory; 8 KB  
(4K x 16) unified data/program RAM  
– 56F8255/56/57: 64 KB (32K x 16) flash memory; 8 KB  
(4K x 16) unified data/program RAM  
• Home appliances  
• Smart sensors  
• Fire and security systems  
• Solar inverters  
• Battery chargers and management  
• Switched-mode power supplies and power management  
• Power metering  
• eFlexPWM with up to 9 channels, including 6 channels  
with high (520 ps) resolution NanoEdge placement  
• Two 8-channel, 12-bit analog-to-digital converters (ADCs)  
with dynamic x2 and x4 programmable amplifier,  
conversion time as short as 600 ns, and input  
current-injection protection  
• Motor control (ACIM, BLDC, PMSM, SR, and stepper)  
• Handheld power tools  
• Three analog comparators with integrated 5-bit DAC  
references  
• Arc detection  
• Medical devices/equipment  
• Instrumentation  
• Lighting ballast  
• Cyclic Redundancy Check (CRC) Generator  
• Two high-speed queued serial communication interface  
(QSCI) modules with LIN slave functionality  
• Queued serial peripheral interface (QSPI) module  
• Two SMBus-compatible inter-integrated circuit (I C) ports  
• Freescale’s scalable controller area network (MSCAN) 2.0  
A/B module  
• Two 16-bit quad timers (2 x 4 16-bit timers)  
• Computer operating properly (COP) watchdog module  
• On-chip relaxation oscillator: 8 MHz (400 kHz at standby  
mode)  
2
The 56800E core is based on a modified Harvard-style  
architecture consisting of three execution units operating in  
parallel, allowing as many as six operations per instruction  
cycle. The MCU-style programming model and optimized  
instruction set allow straightforward generation of efficient,  
compact DSP and control code. The instruction set is also  
highly efficient for C compilers to enable rapid development  
of optimized control applications.  
• Crystal/resonator oscillator  
• Integrated power-on reset (POR) and low-voltage interrupt  
(LVI) and brown-out reset module  
• Inter-module crossbar connection  
• Up to 54 GPIOs  
• 44-pin LQFP, 48-pin LQFP, and 64-pin LQFP packages  
• Single supply: 3.0 V to 3.6 V  
The MC56F825x/MC56F824x supports program execution  
from internal memories. Two data operands per instruction  
cycle can be accessed from the on-chip data RAM. A full set  
of programmable peripherals supports various applications.  
Each peripheral can be independently shut down to save  
power. Any pin, except Power pins and the Reset pin, can also  
be configured as General Purpose Input/Outputs (GPIOs).  
Freescale reserves the right to change the detail specifications as may be required to permit  
improvements in the design of its products.  
© Freescale Semiconductor, Inc., 2009-2011, 2014. All rights reserved.  

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