MC54HC646J

更新时间： 2024-11-15 00:01:07

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		总线收发器触发器
页数	文件大小	规格书
15页	158K
描述
Octal 3-State Bus Transceivers and D Flip-Flops

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数据手册

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MC54HC646J 数据手册

SEMICONDUCTOR TECHNICAL DATA

High–Performance Silicon–Gate CMOS

J SUFFIX

CERAMIC PACKAGE

CASE 758–02

The MC54/74HC646 is identical in pinout to the LS646. The device inputs

are compatible with standard CMOS outputs; with pullup resistors, they are

compatible with LSTTL outputs.

These devices are bus transceivers with D flip–flops. Depending on the

status of the Data–Source Selection pins, data may be routed to the outputs

either from the flip–flops or transmitted real–time from the inputs (see

Function Table and Application Information).

The Output Enable and the Direction pins control the transceiver’s

function. Bus A and Bus B cannot be routed as outputs to each other

simultaneously, but can be routed as inputs to the A and B flip–flops. Also,

the A and B flip–flops can be routed as outputs to Bus A and Bus B.

Additionally, when either or both of the ports are in the high–impedance

state, these I/O pins may be used as inputs to the D flip–flops for data

storage.

N SUFFIX

PLASTIC PACKAGE

CASE 724–03

DW SUFFIX

SOIC PACKAGE

CASE 751E–04

The user should note that because the clocks are not gated with the

Direction and Output Enable pins, data at the A and B ports may be clocked

into the storage flip–flops at any time.

ORDERING INFORMATION

MC54HCXXXJ

MC74HCXXXN

MC74HCXXXDW

Ceramic

Plastic

SOIC

•

Output Drive Capability: 15 LSTTL Loads

Outputs Directly Interface to CMOS, NMOS, and TTL

Operating Voltage Range: 2 to 6 V

Low Input Current: 1 µA

PIN ASSIGNMENT

High Noise Immunity Characteristic of CMOS Devices

In Compliance with the Requirements Defined by JEDEC Standard

No. 7A

A–TO–B

CLOCK

B–TO–A

CLOCK

A–TO–B

SOURCE

DIRECTION

•

Chip Complexity: 780 FETs or 195 Equivalent Gates

B–TO–A

SOURCE

OUTPUT ENABLE

LOGIC DIAGRAM

DATA

PORT

DATA

PORT

GND

OUTPUT ENABLE

DIRECTION

FLIP–FLOP

CLOCKS

A–TO–B CLOCK

B–TO–A CLOCK

A–TO–B SOURCE

B–TO–A SOURCE

DATA SOURCE

SELECTION

INPUTS

PIN 24 = V

PIN 12 = GND

10/95

Motorola, Inc. 1995

REV 6

3–1

12 3 4 5 6 7...15

中文翻译

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与MC54HC646J相关器件

型号	品牌	获取价格	描述	数据表
MC54HC646JD	MOTOROLA	获取价格	Registered Bus Transceiver, 1-Func, 8-Bit, True Output, CMOS, CDIP24,
MC54HC646JDS	MOTOROLA	获取价格	Registered Bus Transceiver, 1-Func, 8-Bit, True Output, CMOS, CDIP24,
MC54HC646JDS	ROCHESTER	获取价格	Registered Bus Transceiver,
MC54HC646JS	MOTOROLA	获取价格	Registered Bus Transceiver, 1-Func, 8-Bit, True Output, CMOS, CDIP24,
MC54HC646JS	ROCHESTER	获取价格	Registered Bus Transceiver,
MC54HC688	MOTOROLA	获取价格	8-Bit Equality Comparator
MC54HC688J	MOTOROLA	获取价格	8-Bit Equality Comparator
MC54HC688JD	ROCHESTER	获取价格	Identity Comparator,
MC54HC688JDS	ROCHESTER	获取价格	Identity Comparator,
MC54HC732-03AJ	MOTOROLA	获取价格	Octal 3-State Noninverting Transparent Latch

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