DECODER INPUT
DEVICE DESCRIPTION
DDI
An Adaptive Differential PCM (ADPCM) transcoder is used
to reduce the data rate required to transmit a PCM encoded
voice signal while maintaining the voice fidelity and intelli-
gibility of the PCM signal.
Decoder Data Input (Pin 5)
ADPCM data to be decoded are applied to this input pin,
which operates in conjunction with DDC and DIE to enter the
data in a serial format.
The transcoder is used on 64 kbps data streams which
represent either voice or voice band data signals that have
been digitized by a codec (e.g., MC145557). The transcoder
uses a filter to attempt to predict the next PCM input value
based on previous PCM input values. The error between the
predicted and the true PCM input value is the information
that is sent to the other end of the line. Hence the word differ-
ential, since the ADPCM data stream is the difference be-
tween the true PCM input value and the predicted value. The
term “adaptive” applies to the filter that is performing the pre-
diction. It is adaptive in that its transfer function changes
based on the PCM input data. That is, it adapts to the statis-
tics of the signals presented to it.
DDC
Decoder Data Clock (Pin 4)
Data applied to DDI are latched into the transcoder on the
falling edge of DDC and data are output from DDO on the ris-
ing edge of DDC. The frequency of DDC may be as low as
64 kHz or as high as 5.12 MHz.
DIE
Decoder Input Enable (Pin 6)
The beginning of a new ADPCM word is indicated by a ris-
ing edge applied to this input. Data are serially clocked into
DDI on the subsequent falling edges of DDC following the
DIE rising edge. The frequency of DIE may not exceed
8 kHz.
PIN DESCRIPTIONS
ENCODER INPUT
DECODER OUTPUT
EDI
DDO
Encoder Data Input (Pin 12)
Decoder Data Output (Pin 2)
PCM data to be encoded are applied to this input pin which
operates synchronously with EDC and EIE to enter the data
in a serial format.
PCM data are available in a serial format from this output,
which operates in conjunction with DDC and DOE. DDO is a
three–state output that remains at a high–impedance state
except when presenting data.
EDC
DOE
Encoder Data Clock (Pin 13)
Decoder Output Enable (Pin 3)
Data applied to EDI are latched into the transcoder on a
falling edge of EDC and data are output from EDO on a rising
edge of this input pin. The frequency of EDC may be as low
as 64 kHz or as high as 5.12 MHz.
Each ADPCM word is requested by a rising edge on this
input which causes the DDO pin to provide the data when
clocked by DDC. One DOE must occur for each DIE.
CONTEXT
EIE
MODE
Mode Select (Pin 1)
Encoder Input Enable (Pin 11)
The beginning of a new PCM word is indicated to the
transcoder by a rising edge applied to this input. The fre-
quency of EIE may not exceed 8 kHz.
A logic 0 applied to this input makes the transcoder com-
patible with Mu–255 companding and D3 data format. A
logic 1 applied to this pin makes the transcoder compatible
with A–Law companding with even bit inversion data format.
ENCODER OUTPUT
SPC
Signal Processor Clock (Pin 10)
EDO
Encoder Data Output (Pin 15)
This input is typically clocked with a 20.48 MHz clock sig-
nal which is used as the digital signal processor master
clock. This pin has a CMOS compatible input.
ADPCM data are available in a serial format from this out-
put, which operates synchronously with EDC and EOE. EDO
is a three–state output which remains in a high–impedance
state, except when presenting data.
RESET
Reset (Pin 7)
A logic 0 applied to this input forces the transcoder into a
low power dissipation mode. A rising edge on this pin causes
power to be restored and the optional transcoder RESET
state (specified in the standards) to be forced. Valid data is
available at the output pins four input enables after a rising
edge on this pin. This pin has a CMOS compatible input.
EOE
Encoder Output Enable (Pin 14)
Each ADPCM word is requested by a rising edge on this
input, which causes the EDO pin to provide the data when
clocked by EDC. One EOE must occur for each EIE.
MC145532
2
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