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MC14532BALDS PDF预览

MC14532BALDS

更新时间: 2024-11-04 13:01:43
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 编码器
页数 文件大小 规格书
8页 230K
描述
4000/14000/40000 SERIES, 8-BIT ENCODER, CDIP16, 620-09

MC14532BALDS 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP16,.3
针数:16Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.55
Is Samacsys:N其他特性:8 TO 3 LINE PRIORITY ENCODER
系列:4000/14000/40000JESD-30 代码:R-GDIP-T16
JESD-609代码:e0长度:19.3 mm
负载电容(CL):50 pF逻辑集成电路类型:ENCODER
位数:8功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5/15 V
传播延迟(tpd):600 ns认证状态:Not Qualified
座面最大高度:4.19 mm子类别:Arithmetic Circuits
最大供电电压 (Vsup):18 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
Base Number Matches:1

MC14532BALDS 数据手册

 浏览型号MC14532BALDS的Datasheet PDF文件第2页浏览型号MC14532BALDS的Datasheet PDF文件第3页浏览型号MC14532BALDS的Datasheet PDF文件第4页浏览型号MC14532BALDS的Datasheet PDF文件第5页浏览型号MC14532BALDS的Datasheet PDF文件第6页浏览型号MC14532BALDS的Datasheet PDF文件第7页 
SEMICONDUCTOR TECHNICAL DATA  
L SUFFIX  
CERAMIC  
CASE 620  
The MC14532B is constructed with complementary MOS (CMOS)  
enhancement mode devices. The primary function of a priority encoder is to  
provide a binary address for the active input with the highest priority. Eight  
data inputs (D0 thru D7) and an enable input (E are provided. Five outputs  
in)  
are available, three are address outputs (Q0 thru Q2), one group select (GS)  
P SUFFIX  
PLASTIC  
CASE 648  
and one enable output (E ).  
out  
Diode Protection on All Inputs  
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
Capable of Driving Two Low–power TTL Loads or One Low–Power  
Schottky TTL Load over the Rated Temperature Range  
D SUFFIX  
SOIC  
CASE 751B  
MAXIMUM RATINGS* (Voltages Referenced to V  
)
SS  
Symbol  
Parameter  
DC Supply Voltage  
Value  
Unit  
V
ORDERING INFORMATION  
V
DD  
– 0.5 to + 18.0  
MC14XXXBCP  
MC14XXXBCL  
MC14XXXBD  
Plastic  
Ceramic  
SOIC  
V , V  
Input or Output Voltage (DC or Transient)  
– 0.5 to V  
DD  
+ 0.5  
V
in out  
I , I  
Input or Output Current (DC or Transient),  
per Pin  
± 10  
mA  
in out  
T
A
= – 55° to 125°C for all packages.  
P
Power Dissipation, per Package†  
Storage Temperature  
500  
mW  
C
D
T
stg  
– 65 to + 150  
260  
PIN ASSIGNMENT  
T
Lead Temperature (8–Second Soldering)  
C
L
* Maximum Ratings are those values beyond which damage to the device may occur.  
Temperature Derating:  
D4  
D5  
D6  
D7  
1
2
16  
15  
V
DD  
E
out  
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C  
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C  
3
4
5
6
7
8
14  
13  
12  
11  
10  
9
GS  
D3  
D2  
D1  
D0  
Q0  
TRUTH TABLE  
E
in  
Input  
Output  
Q2  
E
in  
D7 D6 D5 D4 D3 D2 D1 D0 GS Q2 Q1 Q0  
E
out  
Q1  
SS  
0
1
X
0
X
0
X
0
X
0
X
0
X
0
X
0
X
0
0
0
0
0
0
0
0
0
0
1
V
1
1
1
1
1
0
0
0
X
1
0
0
X
X
1
0
X
X
X
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
1
1
1
1
1
1
1
1
1
0
0
1
0
1
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
X
1
0
0
X
X
1
0
X
X
X
1
1
1
1
1
0
0
0
0
1
1
0
0
1
0
1
0
0
0
0
0
X = Don’t Care  
This device contains protection circuitry to guard against damage  
due to high static voltages or electric fields. However, precautions must  
be taken to avoid applications of any voltage higher than maximum rated  
voltages to this high-impedance circuit. For proper operation, V and  
in  
V
out  
should be constrained to the range V  
SS  
(V or V ) V .  
in out DD  
Unused inputs must always be tied to an appropriate logic voltage  
level (e.g., either V or V ). Unused outputs must be left open.  
SS DD  
REV 3  
1/94  
Motorola, Inc. 1995  

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