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MC14506UBCPDS

更新时间： 2024-11-29 13:11:15
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摩托罗拉 - MOTOROLA 栅
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MC14506UBCPDS 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
L SUFFIX  
CERAMIC  
CASE 620  
The MC14506UB is an expandable AND–OR–INVERT gate with inhibit  
and 3–state output. The expand option allows cascading with any other gate,  
which may be carried as far as desired as long as the propagation delay  
added with each gate is considered. For example, the second AOI gate in  
this device may be used to expand the first gate, giving an expanded 4–wide,  
2–input AOI gate. This device is useful in data control and digital multiplexing  
applications.  
P SUFFIX  
PLASTIC  
CASE 648  
D SUFFIX  
SOIC  
CASE 751B  
•
•
•
•
•
3–State Output  
Separate Inhibit Line  
Diode Protection on All Inputs  
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
Capable of Driving Two Low–Power TTL Loads or One Low–Power  
Schottky TTL Load Over the Rated Temperature Range  
ORDERING INFORMATION  
MC14XXXUBCP  
MC14XXXUBCL  
MC14XXXUBD  
Plastic  
Ceramic  
SOIC  
T
A
= – 55° to 125°C for all packages.  
MAXIMUM RATINGS* (Voltages Referenced to V  
)
SS  
Symbol  
Parameter  
DC Supply Voltage  
Value  
Unit  
V
V
DD  
– 0.5 to + 18.0  
This device contains protection circuitry to  
guard against damage due to high static  
voltages or electric fields. However, pre-  
cautions must be taken to avoid applications of  
any voltage higher than maximum rated volt-  
ages to this high–impedance circuit. For proper  
V , V  
in out  
Input or Output Voltage (DC or Transient)  
– 0.5 to V  
DD  
+ 0.5  
V
I , I  
in out  
Input or Output Current (DC or Transient),  
per Pin  
± 10  
mA  
P
D
Power Dissipation, per Package†  
Storage Temperature  
500  
mW  
C
operation, V and V  
should be constrained  
in  
out  
to the range V  
(V or V  
in out  
)
V
DD  
.
T
stg  
– 65 to + 150  
260  
SS  
Unused inputs must always be tied to an  
appropriatelogic voltage level (e.g., either V  
T
L
Lead Temperature (8–Second Soldering)  
C
SS  
or V ). Unused outputs must be left open.  
DD  
* Maximum Ratings are those values beyond which damage to the device may occur.  
†Temperature Derating:  
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C  
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C  
TRUTH TABLE  
A B C D  
E
Inhibit Disable  
Z
LOGIC DIAGRAM  
0
0
0
X
0
X
X
0
0
0
X
0
0
X
0
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
A
B
C
D
E
1
2
3
4
5
A
A
A
A
A
X
15 Z  
X
1
X
X
0
1
X
X
X
X
1
0
X
1
1
X
X
0
0
X
X
X
0
0
0
0
1
0
0
0
A
X
X
V
V
= PIN 16  
= PIN 8  
DD  
SS  
INH  
6
X
X
X
X
X
X
X
X
X
X
1
X
0
1
0
High  
Impedance  
3–STATE  
OUTPUT DISABLE  
DIS 14  
X = Don’t Care  
E
D
13  
12  
7
Z
B
B
B
C
11  
10  
B
B
B
A
9
Z = (AB + CD + E + I)  
B
REV 3  
1/94  
Motorola, Inc. 1995  
1234567

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