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MC145076D

更新时间： 2024-02-12 09:36:09
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 消费电路商用集成电路光电二极管
页数 文件大小 规格书
8页 124K
描述
MC145076 Stereo Audio FIR Smoothing Filter

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MC145076D 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：SOP, SOP16,.25Reach Compliance Code：unknown
风险等级：5.92JESD-30 代码：R-PDSO-G16
JESD-609代码：e0端子数量：16
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP16,.25封装形状：RECTANGULAR
封装形式：SMALL OUTLINE电源：5 V
认证状态：Not Qualified子类别：DSP Peripherals
标称供电电压：5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
uPs/uCs/外围集成电路类型：DSP PERIPHERAL, DIGITAL FILTERBase Number Matches：1

MC145076D 数据手册

 浏览型号MC145076D的Datasheet PDF文件第2页浏览型号MC145076D的Datasheet PDF文件第3页浏览型号MC145076D的Datasheet PDF文件第4页浏览型号MC145076D的Datasheet PDF文件第5页浏览型号MC145076D的Datasheet PDF文件第6页浏览型号MC145076D的Datasheet PDF文件第7页 
Order this document  
by MC145076/D  
SEMICONDUCTOR TECHNICAL DATA  
Product Preview  
D SUFFIX  
16–PIN SOG  
CASE 751B–05  
16  
1
CMOS  
The MC145076 is a combination re–clocking and smoothing filter designed  
especially for the MC145074 Stereo Audio DAC. Its versatility however, allows  
it to be used with any single bit–stream data converter to provide output  
reconstruction filtering, and to improve performance by restoring pulse shape  
integrity. The MC145076 provides a well controlled, filtered output that can be  
used directly, or with a current summing operational amplifier.  
ORDERING INFORMATION  
MC145076D  
SOG Package  
The MC145076 is intended to be one half of a two–chip solution for serial bit  
steam DACs. The analog filtering function of the MC145076 eases the digital  
filtering requirements at the input to the digital noise shaping modulator, and  
eliminates the need for precision analog output filtering capacitors, resulting in  
lower overall system cost. The MC145076 pulse shape restoration frees the  
designer from analog pitfalls that can impact performance, thereby lowering the  
risk of new product development with a sigma–delta DAC.  
PIN ASSIGNMENT  
V
1
2
16  
15  
X
DDA  
out  
X
GND  
IOL  
in  
BIAS  
DIV2  
DIL  
3
4
5
6
7
8
14  
13  
12  
11  
10  
9
GND  
GND  
IOR  
•
•
•
•
•
•
•
•
•
•
Single–Ended Stereo Outputs Require no Additional Smoothing Filters  
86 dB S/D, 96 dB S/N with MC145074 @ 192 x OSR Single Ended  
> 100 dB S/(N+D) @ 256 OSR, Differential Mode  
18.5 MHz Maximum Serial Data Input Rate  
– 80 dB Cross Channel Interference  
72–Tap FIR with > 40 dB Alias Filtering  
Operating Temperature Range: – 40 to + 85 C  
Buffered Data Clock Output for Ease of Data Generation  
16–Pin Narrow Body SOIC Package  
DIR  
TEST  
GND  
CLKOUT  
V
DDD  
Single Supply Operation: + 5 V  
5
6
DIL  
DIR  
LEFT 144 SERIAL SHIFT REG.  
LEFT CHOP  
14  
4
DIV2  
TEST  
IOL  
7
16  
144 TAP HAMMING  
WINDOW  
COEFFICIENTS  
X
out  
TIMING  
AND  
CONTROL  
LOGIC  
C (1)  
C (144)  
2
13  
X
in  
GND  
9
CLKOUT  
1
V
DDA  
8
RIGHT 144 SERIAL SHIFT REG.  
RIGHT CHOP  
V
DDD  
10  
15  
GND  
GND  
11  
12  
IOR  
144 TAP HAMMING  
WINDOW  
3
BIAS  
C (1)  
C (144)  
COEFFICIENTS  
GND  
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.  
REV 1  
9/96  
Motorola, Inc. 1996  
12345678

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