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MC145073DW PDF预览

MC145073DW

更新时间: 2024-11-28 22:58:11
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 转换器模数转换器光电二极管
页数 文件大小 规格书
16页 228K
描述
Dual 16-Bit Stereo Audio Sigma-Delta ADC

MC145073DW 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP24,.4
针数:24Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.92Is Samacsys:N
最大模拟输入电压:1.9 V转换器类型:ADC, DELTA-SIGMA
JESD-30 代码:R-PDSO-G24JESD-609代码:e0
长度:15.4 mm模拟输入通道数量:2
位数:16功能数量:1
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C输出位码:BINARY
输出格式:SERIAL封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP24,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
认证状态:Not Qualified座面最大高度:2.65 mm
子类别:Analog to Digital Converters最大压摆率:45 mA
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.5 mm
Base Number Matches:1

MC145073DW 数据手册

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Order this document  
by MC145073/D  
SEMICONDUCTOR TECHNICAL DATA  
Product Preview  
DW SUFFIX  
SOG PACKAGE  
CASE 751E  
CMOS  
24  
1
The MC145073 is a dual–channel, 16–bit A/D converter intended for use in  
digital audio systems such as multimedia, DCC, DAT, and professional audio  
applications. It uses a sigma–delta architecture consisting of a second–order  
analog modulator and two stages of digital filtering for each channel. The  
analog modulator samples the input signal at 128 times the output data rate,  
performs a single–bit quantization, and shapes the quantization noise towards  
higher frequencies. Subsequent on–chip digital filters reject most of the shaped  
quantization noise and lower the data rate.  
ORDERING INFORMATION  
MC145073DW SOG Package  
PIN ASSIGNMENT  
Sixteen unique user–selectable interfacing modes make the MC145073  
compatible with a multitude of application interfacing requirements. A single 5 V  
supply and a power–down mode reduce power supply requirements, making  
the part attractive for portable applications.  
A
A
A
V
1
2
3
4
5
6
7
8
24  
23  
22  
21  
20  
19  
18  
17  
IN(+L)  
IN(+R)  
A
IN(–R)  
IN(–L)  
REF  
Single Supply, Operating Voltage Range: 4.5 to 5.5 V  
128x OSR Sigma–Delta Modulator  
82 dB Typical S/(N+D)  
Analog Inputs Can Be Driven as Either Differential or Single–Ended  
Clock Input May Be 128x, 256x, or 384x the Output Data Rate  
Out–of–Range Input Signals Internally Limited  
On–Chip Digital Filters:  
AG  
V
CSEL0  
CSEL1  
FSEL  
DD(A)  
VSS(A)  
SUB  
I
V
SYNC  
SS(D)  
I
V
5th Order Decimate–by–32 Comb Filter  
121 Tap Decimate–by–4 FIR Filter  
SLAV  
DD(D)  
I
FTP  
FTP  
9
16  
15  
14  
13  
JUST  
User–Selectable Digital Filter Transition Bands  
Versatile Serial Digital Output Interface:  
Configurable as Master or Slave  
I
10  
11  
12  
DOE  
SYNC  
SCLK  
CLK  
Data Can Be Either Left– or Right–Justified  
Interfaces to DSP56000/1 and TMS320 DSPs  
SDO  
2
I S or Japanese Interface Compatibility  
CS5326 Compatible Interface Mode  
Multiplexing of Two MC145073s Accommodated  
Power–Down Mode Consumption: 2.0 mW  
Operating Temperature Range: – 40 to 85°C  
A
A
IN(+L)  
MODULATOR  
COMB FILTER  
FIR FILTER  
IN(–L)  
CLK  
VOLTAGE  
REFERENCE  
DIGITAL  
INTERFACE  
CLK DIVIDERS/DRIVER  
AND CONTROL LOGIC  
SERIAL  
INTERFACE  
MODES  
IN  
A
IN(+R)  
A
COMB FILTER  
FIR FILTER  
MODULATOR  
IN(–R)  
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.  
TMS320 is a trademark of Texas Instruments.  
REV 1  
5/97  
Motorola, Inc. 1997  

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