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MC14024BCL PDF预览

MC14024BCL

更新时间: 2024-11-04 13:11:15
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 计数器
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MC14024BCL 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
L SUFFIX  
CERAMIC  
CASE 632  
The MC14024B is a 7–stage ripple counter with short propagation delays  
and high maximum clock rates. The Reset input has standard noise  
immunity, however the Clock input has increased noise immunity due to  
Hysteresis. The output of each counter stage is buffered.  
Diode Protection on All Inputs  
Output Transitions Occur on the Falling Edge of the Clock Pulse  
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
Capable of Driving Two Low–power TTL Loads or One Low–power  
Schottky TTL Load Over the Rated Temperature Range  
Pin–for–Pin Replacement for CD4024B  
P SUFFIX  
PLASTIC  
CASE 646  
D SUFFIX  
SOIC  
CASE 751A  
MAXIMUM RATINGS* (Voltages Referenced to V  
)
SS  
Symbol  
Parameter  
DC Supply Voltage  
Value  
Unit  
V
ORDERING INFORMATION  
MC14XXXBCP  
MC14XXXBCL  
MC14XXXBD  
Plastic  
Ceramic  
SOIC  
V
DD  
– 0.5 to + 18.0  
V , V  
in out  
Input or Output Voltage (DC or Transient)  
– 0.5 to V  
DD  
+ 0.5  
V
l , l  
in out  
Input or Output Current (DC or Transient),  
per Pin  
± 10  
mA  
T
A
= – 55° to 125°C for all packages.  
P
Power Dissipation, per Package†  
Storage Temperature  
500  
mW  
C
D
T
stg  
– 65 to + 150  
260  
PIN ASSIGNMENT  
T
Lead Temperature (8–Second Soldering)  
C
L
CLOCK  
RESET  
Q7  
1
2
3
4
5
6
14  
13  
12  
11  
10  
9
V
DD  
* Maximum Ratings are those values beyond which damage to the device may occur.  
Temperature Derating:  
NC  
Q1  
Q2  
NC  
Q3  
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C  
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C  
Q6  
Q5  
LOGIC DIAGRAM  
Q4  
V
7
8
NC  
SS  
1
CLOCK  
RESET  
C
Q
C
Q
C
R
Q
Q
C
R
Q
Q
V
V
= PIN 14  
DD  
= PIN 7  
SS  
NC = NO CONNECTION  
R
Q
R
Q
2
12  
11  
4
3
Q1  
Q2  
Q6  
Q7  
Q3 = PIN 9  
Q4 = PIN 6  
Q5 = PIN 5  
REV 3  
1/94  
Motorola, Inc. 1995  

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