MC14013B
Dual Type D Flip-Flop
The MC14013B dual type D flip−flop is constructed with MOS
P−channel and N−channel enhancement mode devices in a single
monolithic structure. Each flip−flop has independent Data, (D), Direct
Set, (S), Direct Reset, (R), and Clock (C) inputs and complementary
outputs (Q and Q). These devices may be used as shift register
elements or as type T flip−flops for counter and toggle applications.
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MARKING
Features
DIAGRAMS
• Static Operation
14
• Diode Protection on All Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Logic Edge−Clocked Flip−Flop Design
PDIP−14
P SUFFIX
CASE 646
MC14013BCP
AWLYYWWG
1
• Logic state is retained indefinitely with clock level either high or
low; information is transferred to the output only on the
positive−going edge of the clock pulse
14
SOIC−14
D SUFFIX
CASE 751A
14013BG
AWLYWW
• Capable of Driving Two Low−power TTL Loads or One Low−power
Schottky TTL Load Over the Rated Temperature Range
• Pin−for−Pin Replacement for CD4013B
1
• These Devices are Pb−Free, Halogen Free and are RoHS Compliant
14
14
013B
ALYW G
G
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
TSSOP−14
DT SUFFIX
CASE 948G
1
MAXIMUM RATINGS (Voltages Referenced to V
)
SS
Symbol
Parameter
Value
−0.5 to +18.0
Unit
V
14
V
DD
DC Supply Voltage Range
SOEIAJ−14
F SUFFIX
CASE 965
MC14013B
ALYWG
V , V
in out
Input or Output Voltage Range
(DC or Transient)
−0.5 to V + 0.5
V
DD
1
I , I
in out
Input or Output Current
(DC or Transient) per Pin
10
mA
A
WL, L
YY, Y
= Assembly Location
= Wafer Lot
= Year
P
Power Dissipation, per Package
(Note 1)
500
mW
D
T
A
Ambient Temperature Range
Storage Temperature Range
−55 to +125
−65 to +150
260
°C
°C
°C
WW, W = Work Week
G or G
= Pb−Free Package
T
stg
(Note: Microdot may be in either location)
T
Lead Temperature
(8−Second Soldering)
L
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V and V should be constrained
in
out
to the range V v (V or V ) v V
.
SS
in
out
DD
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V or V ). Unused outputs must be left open.
SS
DD
© Semiconductor Components Industries, LLC, 2012
1
Publication Order Number:
September, 2012 − Rev. 9
MC14013B/D