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MC14013BFEL PDF预览

MC14013BFEL

更新时间: 2024-01-14 14:37:14
品牌 Logo 应用领域
安森美 - ONSEMI 触发器锁存器逻辑集成电路光电二极管
页数 文件大小 规格书
8页 213K
描述
Dual Type D Flip-Flop

MC14013BFEL 技术参数

是否无铅: 不含铅生命周期:Active
零件包装代码:SOIC包装说明:LEAD FREE, EIAJ, SO-14
针数:14Reach Compliance Code:unknown
风险等级:5.08系列:4000/14000/40000
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:10.2 mm逻辑集成电路类型:D FLIP-FLOP
湿度敏感等级:NOT SPECIFIED位数:1
功能数量:2端子数量:14
最高工作温度:125 °C最低工作温度:-55 °C
输出极性:COMPLEMENTARY封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
传播延迟(tpd):350 ns认证状态:COMMERCIAL
座面最大高度:2.05 mm最大供电电压 (Vsup):18 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:NICKEL PALLADIUM GOLD
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
触发器类型:POSITIVE EDGE宽度:5.275 mm
最小 fmax:7 MHzBase Number Matches:1

MC14013BFEL 数据手册

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The MC14013B dual type D flip–flop is constructed with MOS  
P–channel and N–channel enhancement mode devices in a single  
monolithic structure. Each flip–flop has independent Data, (D), Direct  
Set, (S), Direct Reset, (R), and Clock (C) inputs and complementary  
outputs (Q and Q). These devices may be used as shift register  
elements or as type T flip–flops for counter and toggle applications.  
http://onsemi.com  
Static Operation  
Diode Protection on All Inputs  
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
MARKING  
DIAGRAMS  
14  
PDIP–14  
P SUFFIX  
CASE 646  
Logic Edge–Clocked Flip–Flop Design  
MC14013BCP  
AWLYYWW  
Logic state is retained indefinitely with clock level either high or low;  
information is transferred to the output only on the positive–going  
edge of the clock pulse  
1
14  
Capable of Driving Two Low–power TTL Loads or One Low–power  
Schottky TTL Load Over the Rated Temperature Range  
Pin–for–Pin Replacement for CD4013B  
SOIC–14  
D SUFFIX  
CASE 751A  
14013B  
AWLYWW  
1
14  
TSSOP–14  
DT SUFFIX  
CASE 948G  
14  
013B  
ALYW  
MAXIMUM RATINGS (Voltages Referenced to V ) (Note 2.)  
SS  
Symbol  
Parameter  
Value  
Unit  
V
V
DD  
DC Supply Voltage Range  
0.5 to +18.0  
1
14  
1
V , V  
Input or Output Voltage Range  
(DC or Transient)  
0.5 to V + 0.5  
V
in out  
DD  
SOEIAJ–14  
F SUFFIX  
CASE 965  
MC14013B  
AWLYWW  
I , I  
in out  
Input or Output Current  
(DC or Transient) per Pin  
±10  
mA  
P
D
Power Dissipation,  
500  
mW  
per Package (Note 3.)  
A
= Assembly Location  
WL or L = Wafer Lot  
YY or Y = Year  
WW or W = Work Week  
T
Ambient Temperature Range  
Storage Temperature Range  
55 to +125  
65 to +150  
260  
°C  
°C  
°C  
A
T
stg  
T
Lead Temperature  
L
(8–Second Soldering)  
ORDERING INFORMATION  
2. Maximum Ratings are those values beyond which damage to the device  
may occur.  
3. Temperature Derating:  
Device  
Package  
PDIP–14  
SOIC–14  
Shipping  
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C  
MC14013BCP  
MC14013BD  
2000/Box  
55/Rail  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
MC14013BDR2  
MC14013BDT  
SOIC–14 2500/Tape & Reel  
96/Rail  
high–impedancecircuit. For proper operation, V and V should be constrained  
in  
out  
TSSOP–14  
to the range V  
(V or V  
)
V
DD  
.
SS  
in  
out  
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,  
either V or V ). Unused outputs must be left open.  
MC14013BDTR2 TSSOP–14 2500/Tape & Reel  
SS  
DD  
MC14013BF  
SOEIAJ–14  
SOEIAJ–14  
See Note 1.  
See Note 1.  
MC14013BFEL  
1. For ordering information on the EIAJ version of  
the SOIC packages, please contact your local  
ON Semiconductor representative.  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
March, 2000 – Rev. 3  
MC14013B/D  

MC14013BFEL 替代型号

型号 品牌 替代类型 描述 数据表
MC14013BFELG ONSEMI

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Dual Type D Flip−Flop
MC14013BF ONSEMI

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