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CD4013BCSJ PDF预览

CD4013BCSJ

更新时间: 2024-01-13 06:26:19
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器
页数 文件大小 规格书
6页 76K
描述
Dual D-Type Flip-Flop

CD4013BCSJ 数据手册

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October 1987  
Revised January 1999  
CD4013BC  
Dual D-Type Flip-Flop  
General Description  
Features  
The CD4013B dual D-type flip-flop is a monolithic comple-  
mentary MOS (CMOS) integrated circuit constructed with  
N- and P-channel enhancement mode transistors. Each  
flip-flop has independent data, set, reset, and clock inputs  
and “Q” and “Q” outputs. These devices can be used for  
shift register applications, and by connecting “Q” output to  
the data input, for counter and toggle applications. The  
logic level present at the “D” input is transferred to the Q  
output during the positive-going transition of the clock  
pulse. Setting or resetting is independent of the clock and  
is accomplished by a high level on the set or reset line  
respectively.  
Wide supply voltage range: 3.0V to 15V  
High noise immunity: 0.45 VDD (typ.)  
Low power TTL: fan out of 2 driving 74L  
compatibility: or 1 driving 74LS  
Applications  
Automotive  
Data terminals  
Instrumentation  
Medical electronics  
Alarm system  
Industrial electronics  
Remote metering  
Computers  
Ordering Code:  
Order Number  
CD4013BCM  
CD4013BCSJ  
CD4013BCN  
Package Number  
M14A  
Package Description  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
14-Lead Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
M14D  
N14A  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Truth Table  
Pin Assignments for DIP, SOIC and SOP  
CL  
D
R
S
Q
Q
(Note 1)  
0
1
x
x
x
x
0
0
0
1
0
1
0
0
0
0
1
1
0
1
Q
0
1
1
1
0
Q
1
x
x
x
0
1
No Change  
x = Don't Care Case  
Note 1: Level Change  
Top View  
© 1999 Fairchild Semiconductor Corporation  
DS005946.prf  
www.fairchildsemi.com  

CD4013BCSJ 替代型号

型号 品牌 替代类型 描述 数据表
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