MC14007UBDTEL

更新时间： 2024-11-04 13:11:15

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
8页	243K
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中文翻译

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数据手册

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MC14007UBDTEL 数据手册

The MC14007UB multi–purpose device consists of three

N–channel and three P–channel enhancement mode devices packaged

to provide access to each device. These versatile parts are useful in

inverter circuits, pulse–shapers, linear amplifiers, high input

impedance amplifiers, threshold detectors, transmission gating, and

functional gating.

http://onsemi.com

MARKING

DIAGRAMS

• Diode Protection on All Inputs

• Supply Voltage Range = 3.0 Vdc to 18 Vdc

PDIP–14

P SUFFIX

CASE 646

MC14007UBCP

AWLYYWW

• Capable of Driving Two Low–power TTL Loads or One Low–power

Schottky TTL Load Over the Rated Temperature Range

• Pin–for–Pin Replacement for CD4007A or CD4007UB

• This device has 2 outputs without ESD Protection. Anti–static

precautions must be taken.

SOIC–14

D SUFFIX

CASE 751A

14007U

AWLYWW

MAXIMUM RATINGS (Voltages Referenced to V ) (Note 2.)

TSSOP–14

DT SUFFIX

CASE 948G

007U

ALYW

Symbol

Parameter

Value

Unit

DC Supply Voltage Range

–0.5 to +18.0

V , V

in out

Input or Output Voltage Range

(DC or Transient)

–0.5 to V + 0.5

I , I

Input or Output Current

(DC or Transient) per Pin

±10

in out

SOEIAJ–14

F SUFFIX

CASE 965

MC14007U

AWLYWW

Power Dissipation,

per Package (Note 3.)

500

Ambient Temperature Range

Storage Temperature Range

–55 to +125

–65 to +150

260

°C

= Assembly Location

WL or L = Wafer Lot

YY or Y = Year

WW or W = Work Week

stg

Lead Temperature

(8–Second Soldering)

2. Maximum Ratings are those values beyond which damage to the device

may occur.

3. Temperature Derating:

ORDERING INFORMATION

Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C

Device

Package

PDIP–14

SOIC–14

Shipping

This device contains protection circuitry to guard against damage due to high

static voltages or electric fields. However, precautions must be taken to avoid

applications of any voltage higher than maximum rated voltages to this

MC14007UBCP

MC14007UBD

MC14007UBDR2

MC14007UBDT

MC14007UBF

2000/Box

55/Rail

high–impedancecircuit. For proper operation, V and V should be constrained

out

SOIC–14 2500/Tape & Reel

to the range V

(V or V

)

out

Unused inputs must always be tied to an appropriate logic voltage level (e.g.,

either V or V ). Unused outputs must be left open.

96/Rail

TSSOP–14

SOEIAJ–14

See Note 1.

MC14007UBFEL SOEIAJ–14

1. For ordering information on the EIAJ version of

the SOIC packages, please contact your local

ON Semiconductor representative.

Semiconductor Components Industries, LLC, 2000

Publication Order Number:

March, 2000 – Rev. 3

MC14007UB/D

12 3 4 5 6 7 8

中文翻译

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与MC14007UBDTEL相关器件

型号	品牌	获取价格	描述	数据表
MC14007UBF	ONSEMI	获取价格	Dual Complementary Pair Plus Inverter
MC14007UBFEL	ONSEMI	获取价格	Dual Complementary Pair Plus Inverter
MC14007UBFELG	ONSEMI	获取价格	Dual Complementary Pair Plus Inverter
MC14007UBFL2	ONSEMI	获取价格	IC,COMPLEMENTARY PAIR AND INVERTER,CMOS,SOP,14PIN,PLASTIC
MC14008B	ONSEMI	获取价格	4-Bit Full Adder
MC14008B	MOTOROLA	获取价格	4-Bit Full Adder
MC14008B_05	ONSEMI	获取价格	4−Bit Full Adder
MC14008BAL	MOTOROLA	获取价格	Adder/Subtractor, 4000/14000/40000 Series, 4-Bit, CMOS, CDIP16, 620-09
MC14008BALD	MOTOROLA	获取价格	暂无描述
MC14008BCL	MOTOROLA	获取价格	4-Bit Full Adder

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