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MC10H171 PDF预览

MC10H171

更新时间: 2024-11-11 05:10:23
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
5页 135K
描述
Dual Binary to 1-4 Decoder (Low)

MC10H171 数据手册

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MC10H171  
Dual Binary to 1−4 Decoder  
(Low)  
Description  
The MC10H171 is a binary coded 2 line to dual 4 line decoder with  
selected outputs low. With either E0 or E1 high, the corresponding  
selected 4 outputs are high. The common enable E, when high, forces  
all outputs high.  
http://onsemi.com  
MARKING DIAGRAMS*  
Features  
Propagation Delay, 2 ns Typical  
Power Dissipation 325 mW Typical (same as MECL 10K)  
Improved Noise Margin 150 mV (over operating voltage and  
temperature range)  
16  
1
MC10H171P  
AWLYYWWG  
16  
Voltage Compensated  
1
MECL 10K Compatible  
PbFree Packages are Available*  
PDIP16  
P SUFFIX  
CASE 648  
LOGIC DIAGRAM  
E0 14  
10 Q0 3  
11 Q0 2  
1 20  
12 Q0 1  
A 9  
V
V
V
= PIN 1  
= PIN 16  
CC1  
CC2  
13 Q0 0  
3 Q1 3  
4 Q1 2  
5 Q1 1  
6 Q1 0  
10H171G  
AWLYYWW  
20  
1
= PIN 8  
EE  
B 7  
PLLC20  
FN SUFFIX  
CASE 775  
E 15  
E1 2  
A
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= PbFree Package  
DIP  
WL  
YY  
WW  
G
PIN ASSIGNMENT  
V
V
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC1  
CC2  
E1  
E
Q13  
Q12  
Q11  
Q10  
B
E0  
*For additional marking information, refer to  
Application Note AND8002/D.  
Q00  
Q01  
Q02  
Q03  
A
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 3 of this data sheet.  
V
EE  
Pin assignment is for DualinLine Package.  
For PLCC pin assignment, see the Pin Conversion Tables on page 18  
of the ON Semiconductor MECL Data Book (DL122/D).  
*For additional information on our PbFree strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
March, 2006 Rev. 7  
MC10H171/D  

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