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MC10H113_06 PDF预览

MC10H113_06

更新时间: 2024-11-01 05:10:23
品牌 Logo 应用领域
安森美 - ONSEMI
页数 文件大小 规格书
6页 152K
描述
Quad Exclusive OR Gate

MC10H113_06 数据手册

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MC10H113  
Quad Exclusive OR Gate  
Description  
The MC10H113 is a Quad Exclusive OR Gate with an enable  
common to all four gates. The outputs may be wireORed together to  
perform a 4bit comparison function (A = B). The enable is active  
LOW.  
http://onsemi.com  
MARKING DIAGRAMS*  
Features  
Propagation Delay, 1.3 ns Typical  
Power Dissipation 175 mW Typ/Pkg (No Load)  
16  
Improved Noise Margin 150 mV (Over Operating Voltage and  
MC10H113L  
AWLYYWW  
Temperature Range)  
Voltage Compensated  
1
MECL 10KCompatible  
CDIP16  
L SUFFIX  
CASE 620A  
PbFree Packages are Available*  
16  
1
MC10H113P  
AWLYYWWG  
16  
1
PDIP16  
P SUFFIX  
CASE 648  
10H113  
ALYWG  
SOEIAJ16  
CASE 966  
1 20  
10H113G  
AWLYYWW  
20  
1
PLLC20  
FN SUFFIX  
CASE 775  
A
= Assembly Location  
= Year  
WL, L = Wafer Lot  
YY, Y  
WW, W = Work Week  
G
= PbFree Package  
*For additional marking information, refer to  
Application Note AND8002/D.  
*For additional information on our PbFree strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 3 of this data sheet.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
February, 2006 Rev. 8  
MC10H113/D  

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