5秒后页面跳转
MC10H113P PDF预览

MC10H113P

更新时间: 2024-11-04 22:58:11
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA
页数 文件大小 规格书
3页 100K
描述
Quad Exclusive OR Gate

MC10H113P 技术参数

生命周期:Transferred零件包装代码:DIP
包装说明:DIP, DIP16,.3针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.59其他特性:STROBED OUTPUTS
系列:10HJESD-30 代码:R-PDIP-T16
JESD-609代码:e0长度:19.175 mm
逻辑集成电路类型:XOR GATE功能数量:4
输入次数:2端子数量:16
最高工作温度:75 °C最低工作温度:
输出特性:OPEN-EMITTER封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
最大电源电流(ICC):46 mAProp。Delay @ Nom-Sup:1.9 ns
传播延迟(tpd):1.9 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:4.44 mm
子类别:Gates表面贴装:NO
技术:ECL温度等级:COMMERCIAL EXTENDED
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
宽度:7.62 mm

MC10H113P 数据手册

 浏览型号MC10H113P的Datasheet PDF文件第2页浏览型号MC10H113P的Datasheet PDF文件第3页 
SEMICONDUCTOR TECHNICAL DATA  
The MC10H113 is a Quad Exclusive OR Gate with an enable common to all  
four gates. The outputs may be wire–ORed together to perform a 4–bit  
comparison function (A = B). The enable is active LOW.  
L SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
Propagation Delay, 1.3 ns Typical  
Power Dissipation 175 mW Typ/Pkg (No Load)  
Improved Noise Margin 150 mV (Over Operating Voltage and  
Temperature Range)  
P SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
Voltage Compensated  
MECL 10K–Compatible  
FN SUFFIX  
PLCC  
CASE 775–02  
MAXIMUM RATINGS  
Characteristic  
Symbol  
Rating  
Unit  
Vdc  
Vdc  
mA  
Power Supply (V  
= 0)  
V
EE  
–8.0 to 0  
CC  
Input Voltage (V  
= 0)  
V
I
0 to V  
CC  
EE  
LOGIC DIAGRAM  
Output CurrentContinuous  
— Surge  
I
out  
50  
100  
E
9
Operating Temperature Range  
T
A
0 to +75  
°C  
4
5
Storage Temperature RangePlastic  
— Ceramic  
T
–55 to +150  
–55 to +165  
°C  
°C  
stg  
TRUTH TABLE  
2
3
IN  
E
L
OUTPUT  
L
L
L
L
ELECTRICAL CHARACTERISTICS (V  
0°  
= –5.2 V ±5%) (See Note)  
EE  
H
L
H
25°  
75°  
H
H
X
L
H
X
L
L
H
L
L
6
7
Characteristic  
Symbol Min  
Max  
Min  
Max  
Min  
Max  
Unit  
H
Power Supply Current  
I
E
46  
42  
46  
mA  
Input Current High  
Pins 5, 7, 11, 13  
Pins 4, 6, 10, 12  
Pin 9  
I
µA  
inH  
430  
510  
1100  
270  
320  
740  
270  
320  
740  
10  
11  
14  
15  
V
V
V
= PIN 1  
= PIN 16  
= PIN 8  
CC1  
CC2  
EE  
Input Current Low  
High Output Voltage  
Low Output Voltage  
High Input Voltage  
Low Input Voltage  
I
0.5  
0.5  
0.3  
µA  
inL  
V
–1.02 –0.84 –0.98 –0.81 –0.92 –0.735 Vdc  
–1.95 –1.63 –1.95 –1.63 –1.95 –1.60 Vdc  
–1.17 –0.84 –1.13 –0.81 –1.07 –0.735 Vdc  
–1.95 –1.48 –1.95 –1.48 –1.95 –1.45 Vdc  
OH  
12  
13  
V
OL  
V
IH  
V
IL  
AC PARAMETERS  
DIP  
Propagation Delay  
Data  
Enable  
t
pd  
ns  
PIN ASSIGNMENT  
0.4  
0.5  
1.7  
2.3  
0.4  
0.5  
1.8  
2.4  
0.5  
0.6  
1.9  
2.5  
V
A
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
V
CC2  
CC1  
Rise Time  
Fall Time  
NOTE:  
t
0.5  
0.5  
1.8  
1.8  
0.6  
0.6  
1.9  
1.9  
0.6  
0.6  
2.0  
2.0  
ns  
ns  
r
D
C
D
D
C
C
t
OUT  
OUT  
IN  
OUT  
OUT  
f
B
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,  
after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed  
circuit board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated  
through a 50–ohm resistor to –2.0 volts.  
A
IN  
A
IN  
IN  
B
IN  
IN  
BIN  
IN  
ENABLE  
V
EE  
Pin assignment is for Dual–in–Line Package.  
For PLCC pin assignment, see the Pin Conversion  
Tables on page 6–11 of the Motorola MECL Data  
Book (DL122/D).  
9/96  
Motorola, Inc. 1996  
REV 6  

与MC10H113P相关器件

型号 品牌 获取价格 描述 数据表
MC10H113PD MOTOROLA

获取价格

XOR Gate, ECL, PDIP16
MC10H113PDS MOTOROLA

获取价格

IC,LOGIC GATE,QUAD 2-INPUT XOR,ECL,DIP,16PIN,PLASTIC
MC10H113PG ONSEMI

获取价格

Quad Exclusive OR Gate
MC10H115 ONSEMI

获取价格

Quad Line Receiver
MC10H115_06 ONSEMI

获取价格

Quad Line Receiver
MC10H115FN ONSEMI

获取价格

Quad Line Receiver
MC10H115FN MOTOROLA

获取价格

Quad Line Receiver
MC10H115FNG ONSEMI

获取价格

Quad Line Receiver
MC10H115FNR2 ONSEMI

获取价格

Quad Line Receiver
MC10H115FNR2G ONSEMI

获取价格

Quad Line Receiver