MC100LVEL51DR2G

更新时间： 2024-11-27 04:40:19

品牌	Logo	应用领域
安森美 - ONSEMI		触发器时钟
页数	文件大小	规格书
8页	141K
描述
3.3V ECL Differential Clock D Flip-Flop

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MC100LVEL51DR2G 数据手册

MC100LVEL33

3.3VꢀECL ÷4 Divider

Description

The MC100LVEL33 is an integrated ÷4 divider. The LVEL is

functionally equivalent to the EL33 and works from a 3.3 V supply.

The reset pin is asynchronous and is asserted on the rising edge.

Upon power-up, the internal flip-flops will attain a random state; the

reset allows for the synchronization of multiple LVEL33’s in a system.

http://onsemi.com

MARKING

The V pin, an internally generated voltage supply, is available to

DIAGRAMS*

this device only. For single-ended input conditions, the unused

differential input is connected to V as a switching reference voltage.

may also rebias AC coupled inputs. When used, decouple V

and V via a 0.01 mF capacitor and limit current sourcing or sinking

KVL33

ALYW

to 0.5 mA. When not used, V should be left open.

SOIC−8

D SUFFIX

CASE 751

Features

• 630 ps Typical Propagation Delay

• 4.0 GHz Typical Maximum Frequency

• ESD Protection: >4 kV Human Body Model,

>200 V Machine Model

KV33

ALYWG

TSSOP−8

DT SUFFIX

CASE 948R

• The 100 Series Contains Temperature Compensation

• PECL Mode Operating Range: V = 3.0 V to 3.8 V

with V = 0 V

• NECL Mode Operating Range: V = 0 V

with V = −3.0 V to −3.8 V

• Internal Input Pulldown Resistors

• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test

DFN8

• Moisture Sensitivity Level 1

MN SUFFIX

CASE 506AA

For Additional Information, see Application Note AND8003/D

• Flammability Rating: UL 94 V−0 @ 0.125 in,

Oxygen Index: 28 to 34

= Assembly Location

= Wafer Lot

= Year

• Transistor Count = 130 devices

W = Work Week

M = Date Code

• Pb−Free Packages are Available

= Pb−Free Package

(Note: Microdot may be in either location)

*For additional marking information, refer to

Application Note AND8002/D.

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 5 of this data sheet.

Publication Order Number:

December, 2006 − Rev. 4

MC100LVEL33/D

12 3 4 5 6 7 8

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MC100LVEL51DR2G 替代型号

型号	品牌	替代类型	描述	数据表
MC100LVEL51DR2	ONSEMI	完全替代	Differential Clock D Flip-Flop
MC100LVEL31DG	ONSEMI	类似代替	3.3V ECL D Flip-Flop with Set and Reset
MC100LVEL51DG	ONSEMI	类似代替	3.3V ECL Differential Clock D Flip-Flop

与MC100LVEL51DR2G相关器件

型号	品牌	获取价格	描述	数据表
MC100LVEL51DT	ONSEMI	获取价格	3.3V ECL Differential Clock D Flip-Flop
MC100LVEL51DTG	ONSEMI	获取价格	3.3V ECL Differential Clock D Flip-Flop
MC100LVEL51DTR2	ONSEMI	获取价格	3.3V ECL Differential Clock D Flip-Flop
MC100LVEL51DTR2G	ONSEMI	获取价格	3.3V ECL Differential Clock D Flip-Flop
MC100LVEL51MNR4	ONSEMI	获取价格	3.3V ECL Differential Clock D Flip-Flop
MC100LVEL51MNR4G	ONSEMI	获取价格	3.3V ECL Differential Clock D Flip-Flop
MC100LVEL56	ONSEMI	获取价格	Dual Differential 2:1 Multiplexer
MC100LVEL56_06	ONSEMI	获取价格	3.3V ECL Dual Differential 2:1 Multiplexer
MC100LVEL56DW	ONSEMI	获取价格	3.3V ECL Dual Differential 2:1 Multiplexer
MC100LVEL56DW	MOTOROLA	获取价格	Dual Differential 2:1 Multiplexer

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